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Vendor: AVX


In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the state of the (D) input with all other outputs in the LOW state. In the reset mode all outputs are LOW and unaffected by the address (A0 to A2) and data (D) input. When operating the 259 as an address latch, changing more than one bit of the address could impose a transient-wrong address. Therefore, this should only be done while in the memory mode.


General Note: Devices are ESD protected, however, handling precautions recommended. Note *: Off is 1.0 and on is 2.4V for the 0.33UF50V-1. Off is 2.4V and on is 1.0V for the 0.33UF50V-2. The enable input   has approximately 200mV of hysteresis. See control threshold charts.


  The Micron® Imaging 0.33UF50V is a QXGA-format 1/2-inch CMOS active-pixel digital image sensor with an active imaging pixel array of 2,048H x 1,536V. It incorporates sophisticated camera functions on-chip such as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple two-wire serial interface.   The 3-megapixel CMOS image sensor features Digi- talClarityMicrons breakthrough low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitiv- ity) while maintaining the inherent size, cost, and inte- gration advantages of CMOS.   The sensor can be operated in its default mode or programmed by the user for frame size, exposure, gain setting, and other parameters. The default mode out- puts a QXGA image at 12 frames per second (fps). An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. FRAME_VALID and LINE_VALID signals are output on dedicated pins, along with a pixel clock that is synchronous with valid data.


  • Part Name
  • Q'ty
  • Description
  • Vendor
  • Date Code
  • Date
  • Quotation
  • 0.33
  • 5600
  • 00+
  • 2017-10-19
  • 0.39RJ
  • 5000
  • 大毅
  • 97+
  • 2017-10-19

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