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Vendor: 10000


High FSK Sensitivity: -106 dBm at 20 kBaud/-109.5 dBm at 2.4 kBaud (433.92 MHz) High ASK Sensitivity: -112.5 dBm at 10 kBaud/-116.5 dBm at 2.4 kBaud (433.92 MHz) Low Supply Current: 10.5 mA in RX and TX Mode (3 V/TX with 5 dBm) Data Rate 1 to 20 kBaud Manchester FSK, 1 to 10 kBaud Manchester ASK ASK/FSK Receiver Uses a Low-IF Architecture with High Selectivity, Blocking and Low Intermodulation (Typical Blocking 55 dB at 750 kHz/61 dB at 1.5 MHz and 70 dB at 10 MHz, System I1dBCP = -30 dBm/System IIP3 = -20 dBm) 226 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF Bandwidth Transmitter Uses Closed Loop Fractional-N Synthesizer for FSK Modulation with a High PLL Bandwidth and an Excellent Isolation between PLL and PA Tolerances of XTAL Compensated by Fractional-N Synthesizer with 800 Hz RF Resolution Integrated RX/TX-Switch, Single-ended RF Input and Output RSSI (Received Signal Strength Indicator) Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s Configurable Self Polling and RX/TX Protocol Handling with FIFO-RAM Buffering of Received and Transmitted Data 5 Push Button Inputs and One Wake-up Input are Active in Power-down Mode Integrated XTAL Capacitors PA Efficiency: up to 38% (433 MHz/10 dBm/3 V) Low Inband Sensitivity Change of Typically 1.8 dB within 58 kHz Center Frequency Change in the Complete Temperature and Supply Voltage Range Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt Generation and Low Battery Indicator for Microcontroller Fully Integrated PLL with Low Phase Noise VCO and PLL Loop Filter Sophisticated Threshold Control and Quasi Peak Detector Circuit in the Data Slicer Power Management via Different Operation Modes 433.92 MHz, 868.3 MHz and 315 MHz without External VCO and PLL Components Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode) Efficient XTO Start-up Circuit (> -1.5 kΩ Worst Case Start Impedance) Changing of Modulation Type ASK/FSK and Data Rate without Component Changes Minimal External Circuitry Requirements for Complete System Solution Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor ESD Protection at all Pins (2 kV HBM, 200 V MM) Supply Voltage Range: 2.4 V to 3.6 V or 4.4 V to 6.6 V Temperature Range: -40C to +105C Small 7 7 mm QFN48 Package


The 0.5W30V uses bus cycles of 8 bits each for commands, data, and addresses to execute operations. The operation instructions are listed in the table below. All instructions are synchronized off a high to low transition of #CE. The first low to high transition on SCK will initiate the instruction sequence. Inputs will be accepted on the rising edge of SCK starting with the most significant bit. Any low to high transition on #CE before the input instruction completes will terminate any instruction in progress and return the device to the standby mode.


The 0.5W30V has dedicated pins to indicate signal strength, carrier detect, and LOCK. Optional external resistors allow the carrier detect threshold level to be customized to the user's requirement. In addition, the 0.5W30V provides an 'Output Eye Monitor Test' (OEM_TEST) for diagnostic testing of signal integrity after equalization, prior to reslicing. The serial clock outputs can also be disabled to reduce power. The 0.5W30V operates from a single +5 or -5 volt supply.


  • Part Name
  • Q'ty
  • Description
  • Vendor
  • Date Code
  • Date
  • Quotation
  • 0.5W30V
  • 10000
  • COS
  • DO-35
  • 2017-10-19
  • 0.51R
  • 5000
  • 国巨
  • 05+
  • 2017-10-19
  • 0.5-3
  • 1,000
  • JST
  • 2017-10-19
  • 0.5-4
  • 40
  • JST
  • 2017-10-19
  • 0.5A
  • 全新原装现货
  • 5800
  • 0805+
  • 2017-10-19
  • 0.5W10V
  • 20300
  • new and original,Leaded parts
  • COS
  • DO-35
  • 2017-10-19

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