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0.5W3V

Vendor: 35000

Description

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Applications

Output Stages Operate Antiphase Reducing Input and Output Capacitance Requirements and Power Supply Induced Noise Dual Input Supply Capability for Load Sharing 5-Bit Mobile VID Code: VOUT = 0.6V to 1.75V 1% Output Voltage Accuracy True Remote Sensing Differential Amplifier Power Good Output Voltage Monitor Supports Active Voltage Positioning Current Mode Control Ensures Current Sharing OPTI-LOOPTM Compensation Minimizes COUT Three Operational Modes: PWM, Burst and Cycle Skip Programmable Fixed Frequency: 150kHz to 300kHz Wide VIN Range: 4V to 36V Operation Adjustable Soft-Start Current Ramping Internal Current Foldback and Short-Circuit Shutdown Overvoltage Soft Latch Eliminates Nuisance Trips Available in 36-Lead Narrow SSOP Package

Features

The 0.5W3V employs an onboard timer to prevent the MAC from capturing a network through excessively long transmissions. When this timer is exceeded the chip enters the jabber state, and transmission is disabled. The jabber state is exited after the MII goes idle for 500ms 250ms.

Supplier

  • Part Name
  • Q'ty
  • Description
  • Vendor
  • Date Code
  • Date
  • Quotation
  • 0.51R
  • 5000
  • 国巨
  • 05+
  • 2017-10-18
  • 0.5-3
  • 1,000
  • JST
  • JST RING TERMINAL
  • 2017-10-18
  • 0.5-4
  • 40
  • JST
  • JST RING TERMINAL
  • 2017-10-18
  • 0.5A
  • MICROFUSE
  • 全新原装现货
  • 5800
  • 0805+
  • 2017-10-18
  • 0.5W10V
  • 20300
  • new and original,Leaded parts
  • COS
  • DO-35
  • 2017-10-18

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