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Vendor: 1607
Package Cooled: MIDCOM
D/C: 03+


Several register bits (bit 0 to bit 93) are used to control circuit operation and to adapt certain circuit parameters to the specific application. The control bits are organized in two 8-bit and three 24-bit registers that can be programmed by the 3-wire bus protocol. The bus protocol and the bit-to-register mapping is described in the section 3-wire Bus Description on page 20. The meaning of the control bits is mentioned in the following sections.


Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.


A basic, two-dimensional 000-7093-37R-based system is shown in Figure 2. In this typical arrangement, two Image Manipulation Sequencers process the image. 000-7093-37Rhe only other components needed beyond the source and target image buffer memories are a multiplier-accumulator or pixel inter- polator such as the 000-7093-37RMC2246A Image Mixer or 000-7093-37RMC2250A Matrix Multiplier, and the Interpolation Coefficient Lookup 000-7093-37Rable RAM or ROM.


  • Part Name
  • Q'ty
  • Description
  • Vendor
  • Date Code
  • Date
  • Quotation
  • 000-7093-37R
  • 1,607
  • new and original in warehouse
  • 2017-10-17
  • 000-7093-37R
  • Stock & New, We work 24 hours/day
  • 03+
  • 2017-10-17
  • 0000006K9223
  • 800
  • 绝对有货,欢迎查询
  • IBM
  • 02+
  • 2017-10-17

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