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Vendor: IDT
Package Cooled: 540
D/C: 99P4


As VCE is increased, the power dissipation of the transistor increases until self-heating raises the junction temperature to its maximum safe value. All points along this thermally limited region (dotted lines) produce the same power dissi- pation. VCE • IO is a constant 120W (at 25C) in Figure 2. All points on this region of the curve produce the same maxi- mum junction temperature. Exceeding the safe output cur- rent in this region may damage the transistor junction.


  The MC10/100EP05 is a 2−input differential AND/NAND gate. The device is functionally equivalent to the EL05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP05 is ideal for applications requiring the fastest AC performance available.   The 100 Series contains temperature compensation.


  Data Bus, active High. In word mode, these pins provide a 16-bit data path Inputs/Outputs for read and write operations. In byte mode, DQ[7:0] provide an 8-bit data path   Tri-stateand DQ[15]/A[-1] is used as the LSB of the 21-bit byte address input. DQ[14:8]   are unused and remain tri-stated in byte mode.


  • Part Name
  • Q'ty
  • Description
  • Vendor
  • Date Code
  • Date
  • Quotation
  • IDT74FCT2245TQ
  • 33
  • IDT
  • SSOP20
  • 2017-10-17
  • IDT/DC8
  • ALLY
  • 面议现货
  • 245
  • N/A
  • 2017-10-17

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