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· 2SC800

Description: SG6 (3.58MHz, 0dB) applied to V9, V46=5V, SG2 applied to V60. Adjust the BURST frequency until the voltage on V12 is 2V. Work out difference between the frequency at that time and 3.579545MHz. fA1 = when approach BURST frequency from low frequency. fA2 = when approach BURST frequency ...

Applications: While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1642 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not...

Features: Three control inputs: OE, CE1, and CE2 Shared input and output pins, three-state outputs No clock required Packages 28-pin DIP (600 mil) plastic package: 2SC800 28-pin DIP (300 mil) plastic package: 2SC800S 28-pin SOP (450 mil) plastic package: 2SC800M 28-pin TSOP (8 13.4 mm) plastic ...

· 2N496A

· 2400093

Vendor:EMULEX   Package Cooled:92+   D/C:PLCC84   

Description: Over the years, the performances of the SLICs considerably increased and therefore the need of the protection has also evolved. The CLP30-200B1 is especially designed for the protection of this new generation of SLIC. For this, it is based on both overvoltage and overcurrent protection...

Applications: The device fully supports live-insertion with its Ioff and power-up/ down 3-state. The Ioff circuitry disables the outputs when the power is off, preventing the backflow of damaging current through the device. Power-up/down 3-state places the outputs in the high- impedance state during po...

Features: Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. JA can vary from 25C/W to > 40C/W depending on mounting technique. (See Application Notes Section: ...

· 24LC16B-I/PH

· 2SK490

Description: ! D/A Features C Selectable Auto-mute C Selectable Interpolation Filters C Selectable 32-, 44.1-, and 48-kHz De-emphasis Filters C Configurable ATAPI Mixing Functions C Configurable Volume and Muting Controls C Selectable Serial Audio Interface Formats "Left Justified up...

Applications: The fixed off-time pulse duration is set by user-selected external RC timing networks. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current control circuitry during switching transi- tions. This elimina...

Features: This device is ideal for applications requiring level translation. When operated from a 3.3 V supply, level translation from 3.3 V inputs to 2.5 V outputs occurs. Similarly, if the device is operated from a 2.5 V supply and 2.5 V inputs are applied, the device will translate the outputs to...

· 25VF040-20-4E-S2A

Description: The frequency of oscillation of a quartz crystal is determined by its cut and by the load capacitors connected to it. The ICS728 incorporates on-chip variable load capacitors that pull (change) the frequency of the crystal. The crystal specified for use with the ICS728 is designed to ha...

Applications: hermetic TO-46 transistor packages, while the 25VF040-20-4E-S2AC, 25VF040-20-4E-S2ACA and 25VF040-20-4E-S2AD are also available in the plastic TO-92 transistor package. The 25VF040-20-4E-S2AD is also available in an 8-lead surface mount small outline package. The 25VF040-20-4E-S2A is a comp...

Features: f = 1.039kHz, V + = 3V, CLOAD = 5pF Single Output Active: Over All Settings, V + = 2.7V, CLOAD = 5pF Over All Settings, V + = 5.5V, CLOAD = 5pF 25VF040-20-4E-S2ACMS8, 25VF040-20-4E-S2A: Over All Settings, V + = 2.7V, CLOAD = 5pF Over All Settings, V + = 5.5V, CLOAD = 5pF 25VF040-20-4E-S2AHM...

· 24C163JI

Description: The W29EE512 is shipped with the software data protection enabled. To enable the software data protection scheme, perform the three-byte command cycle at the beginning of a page load cycle. The device will then enter the software data protection mode, and any subsequent write operation must b...

Applications: The PCM58P accepts TTL-compatible logic input levels. Noise immunity is enhanced by the use of Schmitt trigger input architectures on all input signal lines. The data format of the PCM58P is binary twos complement (BTC) with the most significant bit (MSB) being first in the serial input b...

Features: Not only is the MODU pin used to set the carrier amplitude, it can also be used to put modulation on the carrier for write operations. Taking into account the transfer function of the regulation mechanism, a correction network is required to compensate for the system poles and zeroes. These ...

· 2378F5BBPF

Vendor:NEC   Package Cooled:N/A   D/C:05+   

· 2SJ278MYTR-E

Vendor:RENESAS   Package Cooled:10000   D/C:07+   

Description: Output modules accept 0 to +10V (or +10V) single-ended signals and provide an isolated 4-20 mA (or 0-20 mA) process signal. All modules feature a universal pin-out and may be readily hot-swapped under full power and interchanged without disrupting field wiring.

Applications: Mode Select Asynchronous, Active-Low Reset Special Function Pin IOM/IOM2 Interface IOM/IOM2 Interface IOM/IOM2 Interface IOM/IOM2 Interface Ground Ground Line Connection Line Connection Digital Power, +5V Digital Power, +5V 2.5V Analog Reference Voltage Analog Ground Active High Clo...

Features: Internally matched to 50 Ω Wide frequency range (3.3 GHz at 3 dB bandwidth) Flat 22 dB gain (1 dB up to 2.8 GHz) −8 dBm output power at 1dB compression point Good linearity for low current (IP3out = 2 dBm) Low second harmonic, −30 dBc at PD = −40 dBm Uncondition...

· 2SC2408(A)

· 29C040T-70BTSOP32

Vendor:TSOP32   Package Cooled:WIN   D/C:PB   

· 206803-1

· 223878616644

· 293D685X0004P2WE3

· 2SK375

Description: The ADuC842 is a complete smart transducer front-end, inte- grating a high-performance self calibrating multichannel ADC, dual DAC and an optimized single cycle 16MHz 8-bit MCU(8051 instruction set compatible) on a single chip. The device operates from a 32 kHz crystal with an on-chip PLL...

Applications: In this mode, CS is inactive (high) between serial I/O CLOCK transfers and each transfer can be 11 to 16 clocks long. The falling edge of CS begins the sequence by removing DATA OUT from the high-impedance state. The rising edge of CS ends the sequence by returning DATA OUT to the high-impe...

Features: The 2SK375 is an opto-electronic integrated circuit containing a photodiode and transimpedance amplifier on a single dielectrically isolated chip. The transimpedance amplifier consists of a precision FET- input op amp and an on-chip metal film resistor. The 0.09 x 0.09 inch photodiode is...

· 21020-0908

· 2SK2261

· 2-6450120-0

· 293D226K010C2T

Vendor:VISHAY   Package Cooled:.   D/C:09+   

· 2SC1845-T

Description: Expand/Store: A common output that can be used as either an input to an external audio expander or the input to a voice storage medium such as the MX812. Components relevant to the external device requirements should be used at this output. See Figures 2 and 3.

Applications: The PA03 output power stages contain fast reverse recov- ery diodes for sustained high energy flyback protection. This hybrid integrated circuit utilizes thick film resistors, ceramic capacitors and silicon semiconductors to maximize reliability, minimize size and give top performance. ...

Features: The 2SC1845-T requires a 64 bit write password to change the contents of the control register or to write to a block protected memory area. The 2SC1845-T also requires a 64 bit read password to output the contents of the block pro- tected array or the control register. The block protectio...

· 2SD2047R

Description: Digital and user-programmable registers perform a fully electronic compensation of the analog signal path. For applications exposed to large environmental temperature changes such as the - 40C to +125C automotive range, the MAX1458 delivers a total output accuracy better than 1%. For a more ...

Applications: Wiper position of the DS1804 can be stored using the INC and CS inputs. Storage of the wiper position takes place whenever the CS input transitions from low-to-high while the INC is high. Once this condition has occurred the value of the current wiper position will be written to EEPROM memory.

Features: The 2SD2047R is designed to operate in a manner very similar to other 2-wire interface memory products. The major differences result from the higher performance write capability of FRAM technology. These improvements result in some differences between the 2SD2047R and a similar configu...

· 2SB511E

· 2041A

Applications: The 2041A is a low-power, eight-channel CMOS 12-bit analog-to-digital converter with a conversion throughput of 500 kSPS. The converter is based on a successive- approximation register architecture with an internal track- and-hold circuit. It can be configured to accept up to eight input...

Features: I/ODescription Data inputs for an 18-bit bus. When RS is set LOW, internal read and write pointers are set to the first location of the RAM array, FF and PAF go HIGH, and PAE and EF go LOW. A reset is required before an initial WRITE after power-up. When WEN is LOW, data is written into the ...

· 2SD836A

Description: The only external RF components needed for the receiver are the antenna and its matching components. Antennas presenting an im- pedance in the range of 35 to 72 ohms resistive can be satisfactorily matched to the RFIO pin with a series matching coil and a shunt matching/ESD protection coil. Ot...

Applications: The ADC works in fully differential mode from the analog input to the digital outputs. It provides an on-chip 100Ω differential termination for the clock input. The analog input is 500 mVpp on a 100Ω differential input impedance. 50Ω reverse terminations are required for t...

· 2N6493

Vendor:MOT   Package Cooled:04+   D/C:TO-3   

Description: 2. Controls low-level analog signals PhotoMOS relays feature extremely low closed-circuit offset voltage to enable control of low-level analog signals without distortion. 3. High sensitivity, low ON resistance Can control a maximum 0.15 A load cur- rent with a 5 mA input current. Low O...

Applications: International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) usi...

Features: • For upper-leg IGBTS : Drive circuit, High voltage isolated high-speed level shifting, Control circuit under-voltage (UV) protection. Note : Bootstrap supply scheme can be applied. • For lower-leg IGBTS : Drive circuit, Control circuit under-voltage protection (UV), Short-circu...

· 2SC4099TLP

Vendor:ROHM   Package Cooled:SOT323   D/C:04+   

· 2SC1413A

Description: DESCRIPTION The M74HC4017 is an high speed CMOS DECADE COUNTER/DIVIDER fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transiti...

Applications: Resistor Array Description The 2SC1413A is comprised of a resistor array. The array contains, in effect, 1023 discrete resistive segments that are connected in series (see Figure 1). The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer...

Features: The HUF76013 is an application-specific MOSFET optimized for switching when used as the upper switch in synchronous buck applications. The low gate charge and low input capacitance results in lower driver and lower switching losses thereby increasing the overall system efficie...

· 210-92-06GY02

· 291A

Description: † Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. E...

Applications: 4ž_ÞÐW FUNC [1]‘ôDÈAœ Ah FUNC ÈžôDÖn‹Þ‘ôD 4‘ôD Q[1]vÅ8 K_c £[1]K PAGER ‹œ0Çž_ÐW

Features: VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, li...

· 22D-XXD09NNL

· 2SD1550

Applications: Timer counter 1 : 8-bit 1 (square-wave output, event count, synchronous output event) Clock source 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/64, 1/128 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source coincid...

Features: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.

· 29M04

· 2N1069

Description: The designer can choose the internally generated reference voltages by connecting VRB to VRBS and VRT to VRTS, or provide external reference voltages to the VRB and VRT pins. The internal reference generates 0.6 V at VRB and 2.6 V at VRT. Providing external reference voltages allows easy ...

Applications: The configuration zone consists of 2048 bits of EEPROM memory used for storing pass- words, keys and codes and defining security levels to be used for each user zone. Access rights to the configuration zone are defined in the control logic and may not be altered by the user.

Features: The devices support a wide common-mode input range of 0.05V to 2.35V, allowing for ground potential differ- ences and common-mode noise between the driver and the receiver. A fail-safe feature sets the output high when the inputs are open, or when the inputs are undriven and shorted or parall...

· 215P6LAFA12E

· 2418G01

Vendor:SAM   Package Cooled:DIP8   D/C:0031+   

Applications: A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the inc...

Features: During a Read or Write command cycle, Address input defines the colum address, In addition to the column address, AP is used to invoke autoprecharge operation at the end of the burst read or write cycle. If AP is high, autoprecharge is selected and BA0, BA1 defines the bank to be precharged. ...

· 29EE010-90-4I-EK

· 2SB387

Description: SecSi™ (Secured Silicon) Sector region 128-doubleword/256-word sector for permanent, secure identification through an 8-doubleword/16-word random Electronic Serial Number, accessible through a command sequence May be programmed and locked at the factory or by the customer

Features: The Hynix 2SB387 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The Hynix 2SB387 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the cl...

· 293D106X90162T

Vendor:VISHAY   Package Cooled:.   D/C:09+   

· 245602020001829/

Vendor:KYOCERA   Package Cooled:N/A   D/C:05+   

· 2SA558

Description: To protect the product from the effects of humidity until the package is opened, dry-box storage is recommended. If this is not possible, store the product under the following conditions: Temperature: 10 to 30C Humidity: 60% max. The product is packed in a humidity-proof envelope. Ref...

Applications: The parallel I/O interface may be configured for numerous forms of clocking to provide the highest flexibility in system architecture. In addition to clocking the transmit path, the receive interface may be configured to present data relative to a recovered clock or to a local reference clock.

Features: 2SA558: 16-bit resolution 2SA558: 24-bit resolution Power Supply: 2.5 V to 5.25 V operation Normal: 75 µA maximum Power-down: 1 µA maximum RMS noise: 1.5 µV 2SA558: 16-bit p-p resolution 2SA558: 19-bit p-p resolution (21.5 bits effective) Integral nonlinearity: 3.5 ...

· 2SC1041

Description: Margin Dn*: When this open-collector (open-drain) input is asserted to GND, the output voltage is automatically decreased by 5% from the nominal. This feature is used in applications where the load circuit must be tested for operation at the extreme values of its supply voltage tolerance.

Applications: CIRCUIT OPERATION The SP8480 is a complete 8-channel data acqui- sition systems (DAS), with on-board multi- plexer, voltage reference, sample-and-hold, clock and tri-state outputs. The digital control archi- tecture is very similar to the industry-standard 574-type A/D, and uses identi...

Features: The 2SC1041 is well suited for embedded systems and portable devices that require a USB host only, a USB device only, or a combination of a configurable USB host and USB device. The 2SC1041 brings high flexibility to the systems that have it built-in. For example, a system that ...

· 2SC504-Y

Description: CD players read out the digital signal from the disc using a built-in pickup and provide high-fidelity sound. However, portable CD players often become un- able to play back audio normally when, for example, the user goes up or down stairs and the mechanical shock applied to the CD p...

Applications: tPHZBus disable time0.56 ns tPLZSEL to A, B0.57 NOTE: 1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage so...

Features: The 2SC504-Y/2SC504-Y are dual precision, 16-/14-bit, multiplying, low power, current-output, parallel input, digital- to-analog converters. They are designed to operate from single +5 V supply with 10 V multiplying references for 4-quadrant outputs with up to 4 MHz bandwidth.

· 24C08N-10SI-2.7SO8IND

Vendor:SO8   Package Cooled:ATMEL   D/C:Pb   

· 232298-0140

· 2060ASI

Description: Maxims MAX312/MAX313/MAX314 analog switches feature low on-resistance (10Ω max) and 1.5Ω on-resis- tance matching between channels. These switches con- duct equally well in either direction. They offer low leakage over temperature (2.5nA at +85C). Low power consumption and ESD tol...

Applications: The 2060ASI consists of two state machinesCthe SIR Encode and SIR Decode blocks, and a sequential block Clock Divide, which synthesizes the required internal signal INT-CLOCK, based on the inputs A0-A2 and the CLK_ SEL line. The 2060ASI can be placed into Internal Clock Mode (CLK_SEL set to l...

Features: Industry Standard Surface Mount Packages Low Capacitance Diodes Low Resistance Diodes Low Loss Switch Diodes High Isolation Switch Diodes Low Distortion Attenuator Diodes Fast Switching Diodes Single and Dual Diode Configurations Tape and Reel Packaging

· 2-1711093-0

· 25C32SI

Description: Allowing for the internal 800Ω resistance, the external resistance should be 1215Ω, so choose 120Ω. When using a dual tuned circuit the value of coupling capaci- tor is dependent of the Q factor. Table 2 gives a guide to the values needed for best linearity.

Applications: A merged combination of bipolar and MOS technology gives these devices an interface flexibility beyond the reach of standard logic buffers and power driver arrays. The 25C32SI25C32SIA, 25C32SI25C32SILW, 25C32SI25C32SIA, and 25C32SI25C32SILW each have an eight-bit CMOS shift register and ...

Features: The 25C32SI/92 provides four status pins: Empty, Full, Programmable Almost Empty, and Programmable Almost Full. The Almost Empty/Almost Full flags are programmable to single word granularity. The programmable flags default to Empty+7 and Full-7.

· 2018-15CNT

Vendor:ALLOGE   Package Cooled:03+   D/C:DIP-24   

· 201CHA4R7BVLE

· 2500-8ST/RH(MOLEX5045)XPB

· 2SA1180A

Description: 80C186XL PERIPHERAL ARCHITECTURE Chip-Select Ready Generation Logic DMA Unit Timer Counter Unit Interrupt Control Unit Enhanced Mode Operation Queue-Status Mode DRAM Refresh Control Unit Power-Save Control Interface for 80C187 Math Coprocessor (80C186XL Only) ONCE Test Mode

Applications: Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt ƒ Operating Ju...

Features: The 160 I/O cells are grouped into ten sets of 16 bits. Pairs of these I/O groups are associated with a logic Megablock through the use of the ORP. Each Megablock is able to provide one Product Term Output Enable (PTOE) signal which is globally distributed to all I/O cells. The PTOE can ...

· 270PJ

Vendor:CCT   Package Cooled:02+   D/C:1210   

· 2SC3972A

Description: The 2SC3972A device is protected by U.S. patent number 4,631,603,4,577,216 and 4,819,098 and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay- per-view uses...

Applications: The input jittery negative data is sampled either on the rising or falling edge of RClk depending on the setting of ClkES (pin 10). If ClkES is high, then RNEG will be sampled on the falling edge of RClk. If ClkES is low, then RPOS will be sampled on the rising edge of RClk. This pin is t...

Features: The phantom clock provides timekeeping information including hundredths of seconds, seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including correction for leap years. The phantom ...

· 24C08-WDIP8

· 2040687-3

· 29F002-90

· 2SC3332T-AA

Description: systems where system integrity must be ensured over the life of the vehicle. A fourth plate is used in the gCcell as a selfC test plate. When the user applies a logic high input to the selfCtest pin, a calibrated potential is applied across the selfCtest plate and the moveable plate. The ...

Applications: Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.0V, +25C ambient. 3. Per LVTTL driven input (VIN = 2.4V, control inputs only); A, B, C, and D pins do not contribute to ICC.

Features: DE2SC3332T-AACRIPTION: The CENTRAL 2SC3332T-AAEMICONDUCTOR 2SC3332T-AA, 2SC3332T-AA types are complementary silicon Darlington transistors manufactured by the epitaxial planar process, epoxy molded in a surface mount package, designed for applications requiring extremely high gain.

· 22TIAAB

· 25H3000(3A)

Vendor:1000   Package Cooled:1808+   D/C:00+   

· 293D107X06RD2T

Vendor:VISHAY   Package Cooled:.   D/C:09+   

· 2SC2412K-LS

Description: You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).

Applications: Port 1 Port 1 is an 8-bit bidirectional I O port with internal pullups The Port 1 output buffers can drive LS TTL inputs Port 1 pins that have 1s written to them are pulled high by the internal pullups and in that state can be used as inputs As inputs Port 1 pins that are externally pulle...

Features: The 2SC2412K-LS series of NPN epitaxial silicon transistors are designed for low cost amplifier and oscillator applications. Low noise figures, high gain and high current capability equate to wide dynamic range and excellent linearity. 2SC2412K-LS's low phase noise distortion and high fT ...

· 28FLS-SM1-TB

· 248249

· 2SK2522-01

· 2SA388

· 21658291-9INDA

Vendor:AMI   Package Cooled:PLCC44P   D/C:04+   

· 2SK3274S

Vendor:HITACHI   Package Cooled:TO-252   D/C:05+/06+   

· 2SA1727P

Description: Interfacing to combined audio/video decoders Interfacing to SAA9042 and SAA5270 teletext decoders and SAA7183 EURO-DENC Program clock reference processing Time stamp processing (PTS/DTS) Output buffering for audio and video Microcontroller interfacing Short filter module Long filte...

Applications: The DS1265W 8Mb nonvolatile (NV) SRAMs are 8,388,608-bit, fully static, NV SRAMs organized as 1,048,576 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry that constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, ...

Features: The 2SA1727Ps parasite power circuit allows the 2SA1727P to operate without a local external power supply. This ability is especially useful for applications that require remote temperature sensing or that are very space constrained. Figure 1 shows the 2SA1727Ps parasite-power control circuit...

· 2N1862

Vendor:MOT   Package Cooled:02+   D/C:1000   

· 2SD1353

Description: Surface mount equivalents to the JEDEC registered 1N5221 thru 1N5281B series Hermetically sealed surface mount package RoHS Compliant devices available by adding e3 suffix Internal metallurgical bond option available by adding a -1 suffix (see separate data sheet for same part numbers with -...

Applications: The TPS6210x family is highly efficient at both low and high output currents. The tri-function MODE input pin is used to select constant-frequency, auto-mode, or light-load modes of operation. The multimode operation allows the IC to select the most efficient operating mode, or if desirable...

Features: TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operating input current permits dire...

· 28LD/TSSOP4.4MM

Vendor:AMKOR   Package Cooled:TSSOP   D/C:01+   

Description: AV+,BV+,CV+ - are pins for connecting the tops of each half bridge to the high voltage supply. Each pin must be connected individually, as there is no internal connection across the three half bridges. Proper power supply bypassing must be connected to these pins and the V- pins as close ...

Applications: The TMC22x5yA family of Digital Video Decoders offers unprecedented, broadcast-quality video processing perfor- mance in a single chip. It accepts line-locked or subcarrier- locked composite, YC, or D1 digital video and produces dig- ital components in a variety of formats.

Features: NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. Package body is approximately 14mm x 14mm x 1.4mm. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-mark...

· 20424-22

Description: Hynix HYMD532M726(L)6-K/H/L series is unbuffered 200-pin double data rate Synchronous DRAM Small Outline Dual In-Line Memory Modules (SO-DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD532M726(L)6-K/H/L series consists of five 32Mx16 DDR SDRAM in 400mil TSOP II packag...

Applications: The 20424-22 CPLD is electrically reprogrammable using industry standard device programmers from vendors such as Data I/O, BP Microsystems, SMS, and others. The 20424-22 also includes an industry-standard, IEEE 1149.1, JTAG interface through which In-System Program- ming (ISP) and repro...

Features: The 20424-22 is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming c...

· 2SB905

Description: Renewed operation of S1 causes the interruption of the relay contact and the relay is disabled. Each operation of the toggle switch, S1, changes (alters) the condition of the relay output when the debounce time, t3, is exceeded i.e., the TOGGLE function.

Applications: When LRC is at a logic 1, LRD will sink current which energizes the Loop Relay (K1), connecting XLA to XLB and XLC to XLD. This places a line termination across Tip and Ring. The device can be considered to be in an off-hook state and DC loop current will flow. The line termination consists of...

Features: The 2SB905 is a 64-position, one-time programmable (OTP) digital potentiometer2, which employs fuse link technology to achieve the memory retention of resistance setting function. OTP is a cost-effective alternative over the EEMEM approach for users who do not need to reprogram new memory...

· 264-7USOC/S400-A6

Vendor:EVER LIGHT   Package Cooled:.   D/C:07+   

· 2N213A

Description: † All typical values are at VCC = 5 V. ‡ The parameters IOZH and IOZL include the input leakage current. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. ¶ This is the increase in supply current for each input...

Applications: An external capacitor C is charged and discharged by two cur- rent sources. Current source #2 is switched on and off by a flip- flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the ca...

Features: The waveform plots of Figure 5 show the simulation results of an output driving a single line vs two lines. In both cases the drive capability of the 2N213A output buffers is more than sufficient to drive 50Ω transmission lines on the incident edge. Note from the delay measurements...

· 293D476X0020D2T

Description: INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Voltage Adjustment Range Max Output Voltage Swing1 dB Compressed Output Common-Mode Offset Output Common-Mode DriftC40C to +85C Output Differential Offset Voltage Output Differential Offset Drift C40C to +85C Input Bias Current Inpu...

Applications: The MBM29DL16XTE/BE are pin and command set compatible with JEDEC standard E2PROMs. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Writ...

Features: The 293D476X0020D2T is a single supply, high efficiency 2.5W switch- ing audio amplifier. A low noise, filterless PWM architecture eliminates the output filter, reducing external component count, board area consumption, system cost, and simplifying design. The 293D476X0020D2T is designed...

· 25TWSS100MTA

· 2SC1880(K)

Vendor:HIT   Package Cooled:TO-220   D/C:05+/06+   

· 2SB1334(A)

Vendor:RHM   Package Cooled:TO-220   D/C:05+/06+   

· 290744

Vendor:SOP- 8   Package Cooled:.   D/C:2004+   

Description: RF output and bias pin. Bias should be supplied to this pin through an external series resistor and RF choke inductor. Because DC biasing is present on this pin, a DC blocking capacitor should be used in most applications (see application schematic). The supply side of this bias netw ...

Applications: pins together. When the PE input is LOW, the LS195A appears as four common clocked D flip-flops. The data on the parallel inputs P0, P1, P2, P3 is transferred to the respective Q0, Q1, Q2, Q 3 outputs following the LOW to HIGH clock transition. Shift left operations (Q3 Q2) can be achieve...

Features: Analog Ground Logic output. When low, indicates that the level of the input signal has overloaded the amplifier. Positive 5 Volts Logic input. When high, both amplifiers are muted. When low (grounded), both amplifiers are fully operational. Single-ended input (Channel 1 & 2) Break-befor...

· 216KR1C45

Description: 6. For data calls, Part 68 rules require silence on the phone line for at least 2 seconds after a data call has been completed to allow central offices to exchange billing information and specifies the transmit level must not exceed -9dBm. The FCC rules also require that for voice c...

Applications: 1. Permanent device damage may occur if the ratings in Absolute Maximum Ratings section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rat...

Features: The PCA216KR1C45 consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active HIGH or Active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing...

· 2S136

Description: Measured using analog input circuit in Figure 51 and digital stimulus in Figure 56 and Figure 57 and reference voltage of 4.096 V. Calculated on the first nine harmonics of the input frequency. Can vary +/-30%. This includes only +VA current. With +VBD = 5 V, +VBD current is typically 1 mA ...

Applications: Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, TA = 25C ambient and maximum loading. 3. Per TTL driven input (control inputs only); A and B pins do not contribute ...

Features: 3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML) before contract award (see 4.2 and 6.3).

· 2SA361

Description: BVDSSDrain-to-Source Breakdown Voltage ∆BV DSS/∆T J Temperature Coefficient of Breakdown Voltage RDS(on)Static Drain-to-Source On-State Resistance VGS(th)Gate Threshold Voltage g fsForward Transconductance IDSSZero Gate Voltage Drain Current

Applications: This table shows the Phase Output state versus the state of the Hall-Effect and Direction Inputs. Please note that the Hall-Effect Inputs are Grey-encoded; that is, only one input is allowed to change from one input state to another at a tm.ie

Features: The 2SA361 is a committed dual single-pole/double-throw (SPDT) that consist of two normally open (NO) and two normally (NC) switches. This configuration can be used as a dual 2-to-1 multiplexer. The 2SA361 is pin compatible with the MAX4684 and MAX4685.

· 216HSA4ALA12FGRS485MH

Vendor:ATI   Package Cooled:BGA   D/C:07+   

· 2SJ492

Description: G5131-25T21U G5131-26T21U G5131-27T21U G5131-28T21U G5131-29T21U G5131-30T21U G5131-31T21U G5131-32T21U G5131-33T21U G5131-34T21U G5131-35T21U G5131-36T21U G5131-37T21U G5131-38T21U G5131-39T21U G5131-40T21U G5131-41T21U G5131-42T21U G5131-43T21U G5131-44T21U G5131-45T21U G513...

Applications: Unicorn shipping package includes a complete set of field proven software drivers and tools for Windows, Mac and Linux, including PC software for modem control and communications protocols. The software drivers are fully configurable and include diagnostic tools which are specifically develo...

Features: For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs in- curred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Semiconductor Group ...

· 22182151

· 21049-0158

· 21049-0187

· 2SC4351-S5

· 2920SMD075

· 20821

Description: Electrically isolated: DBC base plate 3500 VRMS isolating voltage Standard JEDEC package Simplified mechanical designs, rapid assembly Auxiliary cathode terminals for wiring convenience High surge capability Wide choice of circuit configurations Large creepage distances UL E78996 ...

Applications: The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power sup- plies and drivers for solenoids, relays and contactors.

Features: The 20821/20821 feature a P-channel MOSFET pass transistor. This provides advantages over similar designs using PNP pass transistors, including longer battery life. The P-channel MOSFET requires no base drive, which reduces quiescent current considerably. PNP-based regulators waste considerab...

· 2597A

Vendor:N/A   Package Cooled:SOP-8   D/C:N/A   

· 2SC1850

Description: ADV/LD will increment the internal burst counter regardless of the state of chip enables inputs or WE. WE is latched at the beginning of a burst cycle. Therefore, the type of access (Read or Write) is maintained throughout the burst sequence.

Applications: These devices consist of four independent high-gain frequency-compensated operational amplifiers that are designed specifically to operate from a single supply over a wide range of voltages. Operation from split supplies also is possible if the difference between the two supplies is 3 V...

Features: System oriented features for mobile, graphics and large memory systems include power management, byte masking, and x18 organization. The two data bits in the x18 organiza- tion are general and can be used for additional storage/band- width or for error correction.

· 2SA1067

Description: Semelab Plc reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by Semelab is believed to be both accurate and reliable at the time of going to press. However Semelab assumes no responsibility for any errors or omissions d...

Applications: This is a dual-purpose pin. During Master Reset, a HIGH on BE will select Big Endian operation. In this case, depending on the bus size, the most significant byte or word on Port A is transferred to Port B first. A LOW on BE will select Little Endian operation. In this case, the least sign...

Features: The filter is followed by a base-band amplifier which boosts the de- tected signal to the BBOUT pin. When the receiver RF amplifiers are operating at a 50%-50% duty cycle, the BBOUT signal changes about 10 mV/dB, with a peak-to-peak signal level of up to 685 mV. For lower duty cycles, the mV/d...

· 2SA2069

Vendor:TOS   Package Cooled:SOT89   D/C:08+   

Description: The DS1554 also contains its own power-fail circuitry which automatically deselects the device when the VCC supply enters an out of tolerance condition. This feature provides a high degree of data security during unpredictable system operation brought on by low VCC levels.

Applications: Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax, JA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (TJmax − TA)/JA or the number given in the Absolute Maximum Ratings, whichever ...

Features: The 2SA2069 provides the added functionality of being able to simultaneously read from one memory bank while erasing, or programming to one other memory bank. Once the internally controlled Erase or Program cycle in a memory bank has commenced, a different memory bank can be accessed for rea...

· 2-520183-4

Description: ITU-T recommendations specify limits on the tolerance, transfer, and generation of jitter. Signal quality at the LA output (as represented by the eye opening) is usually low, mostly as a consequence of nonideal components in the optical transmission system. Because the CDR must accept a cert...

Applications: Std., A, C, and D grades Low input and output leakage 1µA (max.) CMOS power levels True TTL input and output compatibility: C VOH = 3.3V (typ.) C VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Military product complian...

Features: Thermal shutdown turns off the output if the die temperature exceeds approximately 135C. The switch automatically restarts when the temperature falls 10C. The 2-520183-4 is available in SOIC packages with a tempera- ture range of C40C to +85C.

· 2DS-LY0.040

· 293D475X0035C8T

· 24C16CML1

Description: The speakerphone algorithm constantly adjusts its parameters to deliver the best performance during real-time conditions, allowing automatic fallback from full-duplex to pseudo-duplex. The host controller can easily set up the speaker mute, microphone mute, automatic gain control (AGC) ...

Applications: Sector Tag/Sync Bytes The first byte of each sector is pre-programmed during manufacturing with a Tag/Sync value of C9H. Although the first byte of each sector can be changed, it is recommended that Tag/Sync value be maintained and incorporated as part of the applications sector formatti...

Features: Each 24C16CML1 has its own 64-bit ROM registration number that is factory lasered into the chip inside to provide a guaranteed unique identity for absolute traceability. The durable MicroCan package is highly resistant to environmental hazards such as dirt, moisture, and shock. Its compact co...

· 2976

Vendor:MSC   Package Cooled:QFN-16   D/C:07/08+   

Applications: Stresses above the ratings listed below can cause permanent damage to the 2976A. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device, at these or any other conditions, above those indicated in the operational ...

Features: The 2976 employs a Serial Peripheral Interface (SPI) bus. It is specified to operate at speeds up to 20 MHz. This high-speed serial bus provides high performance serial communication to a host microcontroller. Many common microcontrollers have hardware SPI ports allowing a direct interf...

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