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· 57C256-70T

Description: The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as- sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek mak...

Applications: The LS160 and LS162 count modulo-10 in the BCD (8421) sequence From state 9 (HLLH) they increment to state 0 (LLLL) The 161 and 163 count modulo-16 binary se- quence From state 15 (HHHH) they increment to state 0 (LLLL) The clock inputs of all flip-flops are driven in parallel through a ...

Features: Hardware features protect against inadvertent programs to the AT57C256-70T in the following ways: (a) VCC sense C if VCC is below 3.8V (typical), the program function is inhibited; (b) VCC power on delay C once VCC has reached the VCC sense level, the device will automatically time out 5 ms...

· 5650-3R9K

Description: The device is controlled either via a 3 wire serial interface or directly using the hardware interface. These interfaces provide access to features including channel selection, volume controls, mutes, de-emphasis and power management facilities. The device is available in a 28-pin SSOP.

Applications: Input for Primary Voltage Monitoring. In the normal operation V3 is moving between the thresholds V3H and V3L (V3H > V3 > V3L). V3 < V3L: SMPS is switched OFF (line voltage too low). V3 > V3H : Compensation of the overload point regulation (controlled by pin 2) starts at V3H :...

· 58LC32K36B2LG-9

Vendor:MT   Package Cooled:96+   D/C:QFP   

Description: Crystal oscillator input Power supply +5V DC Loop filter ground (0V) Loop filter External inductor for VCO External inductor for VCO Ground (0V) Power supply +5V DC Data input Data output Transmitter power setting Ground (0V) Power supply +5V DC Ground (0V) Antenna terminal ...

Applications: A LOW signal on the asynchronous master reset input (MR) overrides the Sn and clock (CP) inputs and resets the flip-flops. All other state changes are initiated by the rising edge of the clock pulse. Inputs can change when the clock is either state, provided that the recommended set-up an...

Features: The 58LC32K36B2LG-9 OptoRec interface has been designed for ease of use and flexibility in systems designed to interface to the ADATâ protocol. It supports both left and right justified data formats for ease of integration into existing devices as well as new devices. These forma...

· 53780-0790

· 537800790

Vendor:MOIEX   Package Cooled:N/A   D/C:05+   

Description: A refresh counter is on-chip and is multiplexed with the row and column inputs Its contents appear at the address out- puts of the DP8419 during any refresh and are incremented at the completion of the refresh Row Column and bank address latches are also on-chip However if the address in...

Applications: Hynix HYMD512G726(L)4-K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the las...

· 54S163ADM

Vendor:NSC   Package Cooled:06+   D/C:800   

· 5962-9080308MLA

Description: General layout and supply bypassing play major roles in high frequency performance and thermal characteristics. Fairchild offers a demonstration board, FMS6400DEMO, to use as a guide for layout and to aid in device testing and characterization. The FMS6400DEMO is a 4-layer board with a fu...

Applications: CCR access The contents of the CCR can be modified by performing a byte or a page write operation directly to any address in the CCR. Prior to writing to the CCR (except the status register), however, the WEL and RWEL bits must be set using a two step process (See section Writing to the...

Features: Reference Select Input: The REFSEL input controls how the reference input is configured. When LOW, it will use the REFA pair as the reference input. When HIGH, it will use the REFB pair as the reference input. This input has an internal pull-down.

· 55510-106TR

Vendor:FCI   Package Cooled:08+   D/C:10000   

· 5962-8415601SA

· 54HC14J

Vendor:TI   Package Cooled:DIP   D/C:95+   

Description: Internal sample-and-hold Internal Reference Capability Dual gain settings Offset correction Selectable offset binary or 2s complement output Multiplexed or parallel output bus Single +3.0V to 3.6V operation Power down and standby modes 3V TTL Logic input/output compatible

Applications: NOTES: 1. S.G. set to: f p 1.0 MHz; duty cycle = 50%; tr, tf, p 10 ns. 2. tSK1 = tPDHCtPDL for each driver. 3. tSK2 computed by subtracting the shortest tPDH from the longest tPDH of the 2 drivers within a package. 4. tSK3 computed by subtracting the shortest tPDL from the...

Features: NOTES 1. ABSOLUTE MAXIMUM RATING specifies the values beyond which the device may be damaged permanently. Exposure to ABSOLUTE MAXIMUM RATING conditions for extended periods may affect reliability. Each condition value is applied with the other values kept within the following operating ...

· 50-36-2379

· 5962-3870501MPA

Description: A set of eight configuration registers are provided to control various functions of the PC87334 These registers are ac- cessed using two 8-bit wide index and data registers The ISA I O address of the register pair can be relocated using a power-up strapping option

Applications: These signal lines are used to latch the output data from the primary to the auxiliary output ports, as well as supplying a synchronous clock for downstream digital circuitry, such as demuxes or high-speed memory devices. Data changes are triggered on the rising edge of the DREADY clock.

Features: IV Conclusions A silicon bipolar low power LNA for 1.9GHz has been designed and tested. It shows a noise figure of 2.3dB along with a 15dB gain. The power consumption is only 5.2mW resulting in a high gain/DC-power figure of merit of 2.9dB/mW. The design was done on a transistor array showi...

· 51862DELCOPLCCN/A

· 54AC244LMQB

Vendor:N/A   Package Cooled:LCC   D/C:N/A   

· 54F157A/BEA/NO3

· 593D156X9016C2W

· 5011SC007

· 592D475X9025C2T15H

Description: The output capacitor is needed for stability and to minimize the output noise. The required value of the capacitor varies with the load. However, a minimum value of 10µF Aluminum will guarantee stability over load. A tantalum capacitor is recommended for a fast load transient respon...

Applications: Fluid analysis is essential in a wide range of current applications. Biology, medical analysis, genetic engineering, and many other fields rely on fast, precise, and reproducible chemical and biological analyses. Tools that automate the dosing and analysis of fluid samples are essential for...

Features: TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all ...

· 54S04/BCBJC

Vendor:TI   Package Cooled:DIP   D/C:2005+   

Description: The HY51V(S)16160HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16160HG/HGL has realized higher density, higher performance and various functions by utiliz- ing advanced CMOS process technology. The HY51V(S)16160HG/HGL offers Fast Page Mode as a high spee...

Applications: The 54S04/BCBJC contains advanced pop & click circuitry which eliminates noise which would otherwise occur during turn-on and turn-off transitions. The 54S04/BCBJC is unity-gain stable and can be configured by external gain-setting resistors.

Features: Added -7 Bining product. - In Ordering Information. - In Capacitacne - In DC Characteristics-ll - In AC Characteristics-l, ll • Eleminated -10 Bining product. • Changed DC Characteristics-ll. - tCKto 15ns from min in Test condition - -K IDD4 CL2 to 120mA from 100mA -...

· 5962-9224203MRA

· 54LS241BRAJC

Description: The MX29LV160BT/BB is a 16-mega bit Flash memory organized as 2M bytes of 8 bits or 1M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV160BT/BB is packaged in 44-pin SOP, 48-pin TSOP and 48-ball C...

Applications: 2. Latching relay In order to assure proper operating re- gardless of changes in the ambient usage temperature and usage conditions, nomi- nal operating voltage should be applied to the coil for more than 30 ms to set/reset the latching type relay.

Features: During output onCtime of the power switch, this pin receives a voltage proportional to power switch current set by the current sensing resistor. The information is utilized to terminate output switch conduction by PWM action or overcurrent limit circuitry.

· 54F253DMQB/QS

· 50EXG11

Description: Port 0: Port 0 is an open-drain, bi-directional I/O port. Port 0 pins that have 1s written to them float and can be used as high impedance inputs. Port 0 must be polarized to VCC or VSS in order to prevent any parasitic current consumption. Port 0 is also the multiplexed low-order address ...

Applications: A ceramic capacitor(0.1µF) should be connected from pin 8 to pin 5 to stabilize the operation of the high gain linear amplifier. Failure to provide the bypassing may impair the switching proparty. The total lead length between capacitor and coupler should not exceed 1cm.

Features: The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omis- sions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices ...

· 54HC132/BEA

Vendor:TI   Package Cooled:06+   D/C:800   

· 5Z0507

· 5767121-9

· 593D226X9010B2T

· 54F10/BCBJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 5962-84090012A

· 5595

Vendor:SiS   Package Cooled:QFP   D/C:99+   

Description: The DM9801 is a physical-layer, single-chip, low-power transceiver for 1M Home Phoneline Network applications. On the media side, it provides an interface to a Home Phoneline wiring system. The reconciliation layer interfaces to the DM9801 either through an IEEE802.3u subset Media Independent...

Applications: † The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. ‡ The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be mea...

Features: NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V). 3. All VSS pins must be connected to ground supply. 4. Pac...

· 57C291B-45DI

Description: Figure 1 shows the basic architecture of the STA111. The devices major functional blocks are illustrated here. The TAP Controller, a 16-state state machine, is the central con- trol for the device. The instruction register and various test data registers can be scanned to exercise the vari...

Applications: The device has numerous display capabilities. It has an integrated video encoder (double sampling) and 10-bit differential video DACs running at 78 MHz to support direct display to high-definition TVs and projectors at different VESA rates up to XGA (1024 x 768) resolutions. The device also...

Features: Self--Test The sensor provides a self--test feature that allows the ver- ification of the mechanical and electrical integrity of the ac- celerometer at any time before or after installation. A fourth plate is used in the g--cell as a self--test plate. When the user applies a logic high i...

· 53611-G26-4LF

Vendor:FCI   Package Cooled:08+   D/C:10000   

· 593D226X9016C2T

Description: Features • International standard packages JEDEC TO-268 and PLUS247 (hole- less TO-247) • High frequency IGBT and antparallel FRED in one package • New generation HDMOSTM process • High current handling capability • MOS Gate turn-on fordrive simplicity...

Applications: This device contains an integrated charge pump and level shifter (for gate drive voltages), integrated shoot-through current protection (cross-conduction suppression logic and timing), and undervoltage detection and shutdown circuitry.

Features: The sectoring of the 593D226X9016C2Ts memory array has been optimized to meet the needs of todays BIOS applications. By optimizing the size of the sectors, the BIOS code memory space can be used more efficiently. Because certain BIOS code modules must reside in their own sectors by themselv...

· 54F298

Vendor:N/A   Package Cooled:CDIP   D/C:N/A   

· 593D476X0025E2TE3

Description: SET (Pin 3): Frequency-Setting Resistor Input. The value of the resistor connected between this pin and V+ deter- mines the oscillator frequency. The voltage on this pin is held by the LTC6900 to approximately 1.1V below the V+ voltage. For best performance, use a precision metal film resisto...

Applications: Bursts can be initiated with either ADSP (Address Status Processor) or ADSC (Address Status Cache Controller) input pins. Subsequent burst addresses can be generated internally and controlled by the ADV (burst address advance) input pin.

Features: DESCRIPTION The 593D476X0025E2TE3LB is a step-up charge pump DC-DC converter which delivers a regulated 5V 4% output at 30mA and over temperature. The input voltage range is 2V to 3.6V (two battery cells). It requires only four external capacitor: two 0.22µF flying capacitors, an...

· 51939-136LF

· 5962-8552801RA

Description: and flexibility. The CMM0330 is packaged in a low-cost, space efficient SO-8 power package that gives excellent elec- trical stability and thermal handling performance with a RÈ of less than 18 C/W. The part is designed to require minimal external circuitry for bias matching, simpl...

Applications: To obtain the highest transfection efficiency and low non-specific effects, optimize transfection conditions by varying DNA and Lipofectamine™ 2000 concentrations, and cell density. Make sure that cells are greater than 90% confluent and vary DNA (µg):Lipofectamine™ 2000 (&m...

Features: In addition, the XC73144 includes a programmable power management feature to specify high-performance or low- power operation on an individual Macrocell-by-Macrocell basis. Unused Macrocells are automatically turned off to minimize power dissipation. Designers can operate speed-critical ...

· 592D156X96R3B2T

Vendor:SMD   Package Cooled:VISHAY   D/C:05+   

Description: 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

Applications: When used in the Long Frame Sync or Short Frame Sync mode, this pin accepts an 8 kHz clock, which synchronizes the input of the serial PCM data at the DR pin. FSR can be asynchronous to FST in the Long Frame Sync or Short Frame Sync modes. When an ISDN mode (IDL or GCI) has been selecte...

Features: The LTC®3727/592D156X96R3B2T-1 are high performance dual step-down switching regulator controllers that drive all N-channel synchronous power MOSFET stages. A con- stant frequency current mode architecture allows phase- lockable frequency of up to 550kHz. Power loss and noise due to the E...

· 552032-1

Description: Once the device has completed its soft start cycle, a low power sleep mode can be invoked by pulling SS below 0.5V typically. In sleep mode, all of the device functions are disabled except for those which are required to bring the device out of sleep mode when SS is released. Typi- cal s...

Applications: The 552032-1 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 200MHz and output skews of 200ps the 552032-1 is ideal for the most demanding clock tree designs. The devices employ a fully differential PL...

Features: Rating to 200V VBR For surface mounted applications Reliable low cost construction utilizing molded plastic technique Plastic material has UL flammability classification 94V-O Typical IR less than 1uA above 10V Fast response time: typically less than 1.0ps for Uni-direction,less than 5.0ns ...

· 593D156X0016B2WE3

· 52793-1890

· 5962-9562301QXA

Description: Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The 5962-9562301QXAES5 is guaranteed to meet performance specifications from 0C to 70C. Specifications over the C40C to 85C operating temperature range are assured by design, character...

Applications: Input and Output Voltages With 3.3-V VCC) Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C Support Unregulated Battery Operation Down to 2.7 V Ioff and Power-Up 3-State Support Hot Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Res...

Features: The product is targeted for use as a gain block/driver amplifier for various current and next generation wireless technologies such as GPRS, GSM and CDMA, where high linearity and medium power is required. In addition, the 5962-9562301QXA will work for numerous other applications within ...

· 5962-9318202Q2A

· 57202-F52-23LF

Vendor:FCI   Package Cooled:08+   D/C:10000   

· 53481-0679

· 5D28-150

Description: The CP3BT10 connectivity processor combines high perfor- mance with the massive integration needed for embedded Bluetooth applications. A powerful RISC core with on-chip SRAM and Flash memory provides high computing band- width, communications peripherals provide high I/O band- width, an...

Applications: On-chip cache memory improves CPU processing performance, and a built-in memory management unit (MMU) performs address translation between a 4-gigabyte virtual space and physical space. An on-chip bus state controller (BSC) provides more efficient external memory access, and enables direct c...

Features: The 5D28-150 is a 12-bit resolution, wideband, third generation member of the TxDAC series of high-performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family, consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit sign...

· 559D

Description: The Sigma Delta Modulator is a 3rd order (second order-first order cascade) structure. Therefore a multibit out- put (2 bit streams) represents the analog input signal. A next digital noise canceller will take the 2 bit streams and calculates a combined stream which is then fed to the decim...

Applications: The cores consist of a serializer, a de-serializer with clock and data recov- ery, and a low-jitter PLL. These cores, shown in Figure 1 as TX, RX and PLL, respectively, are combined into sub-systems per customer specifications. Figure 1 shows a generic full duplex subsystem, with 32 indepe...

Features: The 559D and 559D are designed using low-power techniques in a BiMOS technology. In most applications, the receivers contained in these devices interface to single inputs of peripheral devices such as ACEs, UARTs, or microprocessors. By using sampling, such peripheral devices are usually in...

· 54745101

Vendor:ST   Package Cooled:SOP   D/C:07+   

Description: From Detect Command or Application of PD to Port to Detect Complete Time to Measure PD Signature Resistance (Figure 2) From Successful Detect in Auto or Semiauto Mode to Class Complete From Classify Command in Manual (Figure 2) From Valid Detect to Port On in Auto Mode (Figure 2) From Port...

Applications: DESCRIPTION The STP25NM60N is realized with the second generation of MDmesh Technology. This revolu- tionary MOSFET associates a new vertical struc- ture to the Company's strip layout to yield the world's lowest on-resistance and gate charge. It is therefore suitable for the most demand...

Features: The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal ...

· 5962-8860003GA

· 502871-1

· 54S14/BCAJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 5502780-1

· 59-301690-21

· 593D336X0016D2

· 56377-5001

· 550-2407F

Vendor:DIALIGHT   Package Cooled:.   D/C:07+   

Description: The memory controller supports single-cycle data accesses from the C67x+ CPU to the RAM and ROM. Up to three parallel accesses to the internal RAM and ROM from three of the following four sources are supported: • Two 64-bit data accesses from the C67x+ CPU • One 256-bit program ...

Applications: Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions (TA = 0 to 70 C) General Recommended Operating Conditions Analog Input and ...

Features: There are eight logic array blocks in the 550-2407F. Each LAB consists of a macrocell array containing 16 macrocells, an expander product term array containing 32 expanders, and an I/O block. The LAB is fed by the programmable interconnect array and the dedicated input bus. All macrocell feedb...

· 5-176313-2

Vendor:AMP   Package Cooled:N/A   D/C:05+   

Description: NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under DC Electrical Characteristics. 2. Per TTL driven input (VIN = 3.4V). 3. For flip-flops, ICCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a meas...

Applications: . . . employing the Schottky Barrier principle in a large area metalCtoCsilicon power diode. StateCofCtheCart geometry features epitaxial construction with oxide passivation and metal overlap contact. Ideally suited for use as rectifiers in lowCvoltage, highCfrequency inverters, free wheeli...

Features: The functionality of each circuit block is customized during configuration by programming internal static memory cells. The values stored in these memory cells determine the logic functions and interconnections implemented in the FPGA.

· 52601-G50-8

Vendor:FCI   Package Cooled:08+   D/C:10000   

· 5201/883BS

Vendor:HP   Package Cooled:CDIP8   D/C:8913+   

· 5962-9214701Q2A

· 54LS257A/BEBJC

Description: During the clamping operation, the input video signal is passed through the device's internal color burst filter. The internal filter attenuates the color burst by typically >15 dB. Figure 1 shows the typical frequency response of the internal color burst filter.

Applications: The Dallas Semiconductor 54LS257A/BEBJC is built to the highest quality standards and manufactured for long- term reliability. All Dallas Semiconductor devices are made using the same quality materials and manufacturing methods. However, the 54LS257A/BEBJC is not exposed to environmental st...

Features: Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Companys standard warranty which is detailed in Atmels Terms and Conditions located on the Companys web site. The Company assumes no responsibility for any errors which ma...

· 50-36-1687

· 5053HD237K0F

· 54LS76/BEAJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 57C49B-CM035

Vendor:WSI   Package Cooled:LCC28   D/C:9027   

· 5962-9224401MRA

· 59132-F40-XX-157

Vendor:FCI   Package Cooled:08+   D/C:10000   

· 50HQ035

Vendor:IR   Package Cooled:DO-5   D/C:04   

Description: Package[1] A: 7.6 mm (0.3 inch) Single Digit Seven Segment Display F: 10 mm (0.4 inch) Single Digit Seven Segment Display G: 10 mm (0.4 inch) Dual Digit Seven Segment Display H: 14.2 mm (0.56 inch) Single Digit Seven Segment Display K: 14.2 mm (0.56 inch) Dual Digit Seven Segment Display

Applications: The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. A low VCC detector automatically inhibits write operations on the loss of power. The end of program or eras...

Features: 50HQ035haracterized by low reverse 50HQ035apacitance the PIN Diodes 50HQ035 was designed for RF signal switching and tuning. As a function of the forward bias current the forward resistance (rf) can be adjusted over a wide range. A long carrier life time offers low signal distortion for...

· 5962-3829414MXA

Description: including Strike Voltage Breakdown test, Endurance Conditioning,Temperaturetest,Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be includ...

Applications: The center tap Schottky rectifier module has been optimized for ultra low forward voltage drop specifically for 3.3V output power supplies. The proprietary barrier technology allows for reliable operation up to 150 C junction temperature. Typical applications are in parallel switching pow...

Features: NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /700 indicates 700 devices per reel). Ordering 700 pieces of DCP01050...

· 547EMA

Vendor:Panasonic   Package Cooled:SOP14S   D/C:2007+   

Description: The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad- dress access and cycle times. It requires a single 4.5 to 5.5V supply.

Applications: The intended application of these devices is for loop-through and redundant channel switching for both point-to-point base-band (PI90LV024) and multipoint (PI90LVB024) data transmissions over controlled impedance media. The package pin assignments enables easy routing for applications req...

Features: The 547EMA reduces motor noise by imparting a slope to the output current when switching the phase to which power is applied. This motor driver includes an automatic recovery constraint protection circuit and is optimal for driving 24 V fan motors.

· 54S393/BEBJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 593D107X0010D2W

Description: memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Both devices provide two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in m...

Applications: Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides ...

Features: A temperature-dependent current limitation in the range of 25 to 100 mA protects the stages in case of a short. Additionally, the chip temperature is monitored. For TChip > 148C, all outputs are disabled and automatically enabled with a hysteresis of TChip > 5C.

· 57C43-45TI

· 512860

· 52885-0974

· 5B34-N-01

Description: Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. Port 3 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally pulled low will source current because of the internal pull-ups....

Applications: 5 ns pin-to-pin logic delays System frequency up to 178 MHz 72 macrocells with 1,600 usable gates Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100-pin TQFP...

Features: Notes: 1. Maximum duration 2 seconds. 2. Maximum allowable power dissipation is derived from VDD = 5.25 V, VB = 2.4 V, VCOL = 3.5 V, 20 LEDs ON per character, 20% DF. 3. 5B34-N-013 derate above 71C at 23 mW/C, RqJ-A = 45C/W. Derating based on RqPC-A = 35C/W per display for printed circuit bo...

· 5962-8958102PA

Vendor:AD   Package Cooled:N/A   D/C:08+   

Description: Servo-Tek low ripple DC tachometer generators satisfy the need for a cost effective, very low ripple tachometer. In addition to being the first economical low ripple units of their type, the F-Series tachometers incorporate all the desirable features of the standard units such as temper...

Applications: The CNY117F is a 110 C rated optocoupler consist- ing of a Gallium Arsenide infrared emitting diode opti- cally coupled to a silicon planar phototransistor detector in a plastic plug-in DIP-6 package. The coupling device is suitable for signal transmission between two electrically separ...

Features: The AD9236 is a monolithic, single 3 V supply, 12-bit, 80 MSPS analog-to-digital converter featuring a high performance sam- ple-and-hold amplifier (SHA) and voltage reference. The AD9236 uses a multistage differential pipelined architecture with output error correction logic to provide 1...

· 5032

Vendor:TI/BB   Package Cooled:QFN-6   D/C:0740+   

Description: The Unicorn II chipset is designed to simplify the development of low-cost ADSL CPE modems for Windows, Mac and Linux based environments and enables manufacturers to achieve a very compet- itive production cost. Due to its controller-less ar- chitecture and particularly the advantage th...

Applications: The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 8). VS = 5V, VCM = 0V unless otherwise noted. For the programmable current option (5032S6 or 5032A), the ISET pin must be connected to V C through 75Ω or...

Features: Serial Data present at the input is transferred to the shift register on the logic 0 to logic 1 transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUT- PUT. The SERIAL DATA must appear at the input prior to the...

· 54LS14FMQB

Description: †Notice: Stresses above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not imp...

Applications: The Samsung M390S2858CT1 is a 128M bit x 72 Synchro- nous Dynamic RAM high density memory module. The Sam- sung M390S2858CT1 consists of eighteen CMOS Stacked 128Mx4 bit Synchronous DRAMs in two TSOP-II 400mil pack- ages, three 18-bits Drive ICs for input control signal, one PLL in 24-pin T...

Features: Read cycle time Address access time Chip enable access time Output enable access time Chip enable to output in low Z Output enable to output in low Z Output enable high to output in low Z Output hold from CE, OE, addresses Write recovery time before read

· 51416R

Vendor:MIDCOM   Package Cooled:SMD16   D/C:2002   

· 56Z4M

· 5962-9682301QCA

· 5043CX2M000J

· 50224-7412

· 54LS367A/BCBJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 5962-9217401M2A

· 54S133/BEA

Description: NOTES: 1. All typical values are at VCC = 5 V, Tamb = 25 C 2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 3. Measured by the voltage drop between the A and the B terminals at the indicated current through the swit...

Applications: The 54S133/BEA is an advanced lamp current feedback dimming control IC. This ballast control IC provides all of the necessary features to implement wide range dimming control, soft start and constant power consumption for intelligent electronic ballast systems. The 54S133/BEA is optimize...

Features: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not im...

· 52.416MHZ

Description: NOTE: 1. The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature. 2. VDD bias must be operated before reset pulse operation. 3. Substrate DC bias(OFD bias) must be operated before horizontal, reset pulse operation.

Applications: The CYV15G0401DXB is verified by testing to be compliant to all the pathological test patterns documented in SMPTE EG34-1999, for both the SMPTE 259M and 292M signaling rates. The tests ensure that the receiver recovers data with no errors for the following patterns:

Features: NOTES: (1) LSB means Least Significant Bit. One LSB for the 10V input range is 4.88mV. (2) Typical rms noise at worst case transition. (3) As measured with fixed resistors shown in Figure 7b. Adjustable to zero with external potentiometer. (4) Full scale error is the worst case of CFull Scale...

· 5962-9060201MRCDG534AAP/883

· 5962-8852201RA

Description: The serial output data word is comprised of 12 bits of data. In operation the data is valid on the falling edge of SCLK. The second clock pulse after the falling edge of CS enables the serial output. After one null bit the data is valid for the next 12 SCLK edges.

Applications: n I2C/SPI Control Interface n I2C/SPI programmable National 3D Audio n I2C/SPI controlled 32 step digital volume control (-54dB to +18dB) n Three independent volume channels (Left, Right, Mono) n Eight distinct output modes n microSMD surface mount packaging n Click and Pop suppress...

Features: The 5962-8852201RA is a precision trimmed 2.5 V 5.0 mV shunt regulator diode. The low dynamic impedance and wide operating current range enhances its versatility. The tight reference tolerance is achieved by on−chip trimming which minimizes voltage tolerance and temperature drift. ...

· 54S164/BEBJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 500A18N331KV4T

· 5962-87556012A

Vendor:NS   Package Cooled:LCC   D/C:2005+   

Description: Short circuit current is internally limited. The device responds to a sustained over- current condition by turning off after a TON delay. The device then stays off for a pe- riod, TOFF, that is 32 times the TON delay. The device then begins pulsing on and off at the TON/(TON+TOFF) duty cyc...

Applications: BYTE64-125Manufacturer Data FieldHYUNDAI MFD- BYTE126-127ReservedReservedFFh BYTE128-255UndefinedUndefindedFFh NOTE : 1.Serial PD interface is standard IIC architecture. 2.Pull-up resistors(4.7K typical value) are required on all open collector bus devices(SCL and SDA). 3.Current sink c...

Features: The 5962-87556012A system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator.

· 5B47-1661166

· 593D106X9020B2W

· 5473/BEAJC

Vendor:TI   Package Cooled:06+   D/C:800   

· 5962-9089502M2A

· 5-0420

Vendor:MOT   Package Cooled:N/A   D/C:07+   

Description: This is a multi−function pin. Soft−start effect is provided during startup with a capacitor connected to this pin. After soft−start period elapsed, the capacitor is used for timing control to determine output overload. If only a capacitor is connected to this pin, its final ...

Applications: Pb−Free Packages are Available Operating Voltage Range of 1.15 V to 5.5 V Output Current Capability in Excess of 50 mA Low Current Consumption of 68 mA (MAX828) or 118 mA (MAX829) • Operation at 12 kHz (MAX828) or 35 kHz (MAX829) • Low Output Resistance of 26 W •...

Features: The GC1012A chip used a slow internal clock to power down the chip or to put it into a low power mode if the clock is stopped. The slow clock has been removed in the 5-0420 and replaced with a mode that will put the chip in a fully static mode if the clock has stopped. The fully static mod...

· 50420-

Vendor:AD   Package Cooled:CAN12   D/C:00+   

· 54F11/BCAJC

Applications: nation for the bus as follows. If the DIFSENS signal is below 0.5V, the termination network is set for single ended. Between 0.7V and 1.9V, the termination network switches to LVD SCSI, and above 2.4V indicates HVD SCSI, causing the terminators to disconnect from the bus. These threshol...

Features: Sensitivity, a commonly specified receiver parameter, provides an indication of the receivers input referred noise, generally input thermal noise. However, it is possible for a more sensitive receiver to exhibit range performance no better than that of a less sensitive receiver if the backgr...

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