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· C42315A68A4

Vendor:TYCO   Package Cooled:original   D/C:08+   

Description: Instruction fetching and execution are pipelined in such a way that a fetch takes an instruction cycle while de- coding and execution takes the next instruction cycle. However, the pipelining scheme causes each instruc- tion to effectively execute in a cycle. If an instruction changes the pro...

Applications: Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The C42315A68A4 is guaranteed to meet performance specifications from 0C to 70C. Specifications over the C 40C to 85C operating temperature range are assured by design, characterizati...

Features: The C42315A68A4 is a CAN physical interface device, dedicated to automotive body electronic multiplexing applications. It operates in differential mode, allowing ground shifts up to 1,5V, reducing RFI disturbances. It offers very low standby current in sleep and standby mode operation and su...

· CA0P07CP

· C71C4256AP-80

Description: has a pull down resistor to force the part into LDO mode when a clock signal is not present. To place the NCP1501 in LDO mode, the user must set the Synchronization pin low. The LDO mode guarantees an output in excess of 50 mA. Pins CB0 and CB1 control the output voltage selection. The ...

Applications: The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. An external pull-up resistor should be connected between SDA and VCC. The value of this resistor and the system capacitanc...

Features: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Ex...

· CKG57NX5R1E476MT

Vendor:TDK   Package Cooled:SMD   D/C:8+   

· CMZ5348B

Vendor:Centralsemi   Package Cooled:SMC/DO-214AB   D/C:2009+   

· CD54HCT597F

Vendor:HAR/TI   Package Cooled:CDIP   D/C:N/A   

· CAT24C08WGI-H1

Vendor:SOP8   Package Cooled:CATALYST   D/C:0604+   

· CM3842

Vendor:CHAMPION   Package Cooled:DIP   D/C:325   

Description: Count Up Clock Input (Active Rising Edge) Count Down Clock Input (Active Rising Edge) Asynchronous Master Reset Input (Active HIGH) Asynchronous Parallel Load Input (Active LOW) Parallel Data Inputs Flip-Flop Outputs Terminal Count Down (Borrow) Output (Active LOW) Terminal Count Up (C...

Applications: H0, H1, H2High-End Terminals of the Potentiometers. For the three potentiometers, it is not required that these terminals be connected to a potential greater than the low-end terminal of the potentiometer. Voltage applied to the high end of the potentiometers cannot exceed the power-supply vo...

Features: The CM3842 also has a rail-to-rail output with a separate output reference pin providing flexible level shifting. The CM3842 operates on a single power supply from 2.7V to 5.5V or dual supplies up to 5.5V. A low power shutdown mode reduces supply current to 0.5µA.

· CND2B10TE104J

Applications: For additional information, refer to the application note, Jitter in PLL-based Systems: Causes, Effects, and Solutions, available at http://www.cypress.com (click on Application Notes), or contact your local Cypress Field Applications Engineer.

Features: Note 11: High speed automatic testing cannot be performed with 60Hz inputs. The CND2B10TE104J is 100% tested with DC stimulus. Correlation tests have shown that the performance limits above can be guaranteed with the additional testing being performed to verify proper operation of all internal...

· CSD20120

Vendor:ETC   Package Cooled:9800   D/C:TO   

· C2012X5R1C475KT000E

Description: Input Termination Center-Tap: Each side of the differential input pair CLK0, /CLK0 terminates to the VT pin. The VT pin provides a center-tap to a termination network for maximum interface flexibility. See CLK0 Input Interface Applications section for more details. For DC-coupled CML or LVDS...

Applications: Where: CL is the load capacitance as specified by the crystal manufacturer, Cs is the stray capacitance of the circuit which is equal to the input capacitance of the 74LVC1GX04 of 5 pF. The feedback resistor (Rf) provides negative feedback and sets a bias point for the un-buffered inverter...

Features: Intersils new ICL32XX family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the 10% tolerance range of...

· CLC520AJP

Vendor:NS   Package Cooled:177   D/C:01+   

Description: The IDT71V3577/79 are high-speed SRAMs organized as 128K x 36/256K x 18. The IDT71V3577/79 SRAMs contain write, data, address and control registers. There are no registers in the data output path (flow-through architecture). Internal logic allows the SRAM to gen- erate a self-timed write bas...

Applications: No Connection. PWM2 output (10V open-drain). PWM1 output (5V open-drain). PWM0 output (5V open-drain). Reset input No Connection. +5V power supply. No Connection. Ground. 12MHz oscillator output. 12MHz oscillator input. Port B5 or I2C interface data line. Port B4 or I2C interface clo...

Features: CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the CLC520AJP/CLC520AJP/CLC520AJP/CLC520AJP features proprietary ESD protection circuitry, per...

· C1206C220K5GACTU

Vendor:KEMET   Package Cooled:SMD   D/C:08+   

· C043012

Description: The HYM71V75S1601 H-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The HYM71V75S1601 H-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising ed...

Applications: FEATURES • SMD Versions of SFH610, 615, 618, 620, 628 • Available on Tape and Reel To Order Use Suffix T • Field Effect Stable by TRIOS (TRansparent IOn Shield) V•VDE 0884 Available with Option 1 • U.L. Approval, File #E52744

Features: The C043012 is a precision amplifier designed for thermoelec- tric cooler (TEC) control in optical networking applications. It is optimized for use in 10kΩ thermistor-based temperature controllers. The C043012 provides thermistor excitation and generates an output voltage proportion...

· CY7C168-45DM

Vendor:CY   Package Cooled:CDIP20   D/C:9420   

· CRCW04023R60JNEA

· CX82110-51

Vendor:advantage series   Package Cooled:BGA   D/C:07+   

Description: Another feature that similar video D/A converters do not have is the Feedthrough Control. This pin allows registered or unregistered operation of the video control and data inputs. In the registered mode, the composite functions are latched to the pixel data to prevent screen-edge distort...

Applications: The K4M56163PE is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNGs high performance CMOS technol- ogy. Synchronous design make a device controlled precisely with the use of system clock and I/O transactions are poss...

Features: Pixel Clock Output The CH7003, operating in master mode, provides a pixel data clocking signal to the VGA controller. This pin provides the pixel clock output signal (adjustable as 1X, 2X or 3X) to the VGA controller (see the section on Digital Video Interface and Registers and Programming fo...

· CY37064P100-154AI

· CRA3A4E510JT

· CL05B473MP5NNNC

Vendor:SAMSUNG   Package Cooled:SMD   D/C:08+   

· CA3013AT

Description: Input Capacitors The recommended input capacitance is determined by the 1.4 ampere minimum ripple current rating and 1500µF minimum capacitance. Capacitors listed below must be rated for a minimum of two times (2) the input voltage with +5V operation. Ripple current and 100mΩ...

Applications: Time filtering on the undervoltage and overvoltage detection and current limiting is programmable via the TIMER Pin. An external capacitor connected between the TIMER Pin and VEE determines the undervoltage/overvoltage time filter and the timeout in current limit. If the pin is tied to VE...

Features: Only bits 11 through 4 of the temperature register are used in the TH and TL comparison since TH and TL are 8-bit registers. If the result of a temperature measurement is higher than TH or lower than TL, an alarm condition exists and an alarm flag is set inside the CA3013AT. This flag is updat...

· CD105-680KC

Description: This familiy is a 64Mbit dynamic RAM organized 16,777,216 x 4 bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read opera- tion. The advanced circuit and process allow this device to achieve high performance and lo...

Applications: The HT82V16 is a complete analog signal pro- cessor for CCD imaging applications. It fea- tures a 3-channel architecture designed to sample and condition the outputs of the trilinear color CCD arrays. Each channel con- sists of an input clamp, Correlated Double Sampler (CDS), offset DA...

Features: The programmable features of the CD105-680KC support two input modes to program the M divider and N output divider. The two input operational modes are parallel and serial. Figure 1 shows the timing diagram for each mode. CD105-680KCn parallel mode the nP_LOAD input is LOW. The data on in...

· CY7C172-45PCB

Vendor:N/A   Package Cooled:DIP   D/C:N/A   

· CD40175BETI

· CL21C270JCANNNC

Description: The modular approach to implementing a USB interface device allows the designer to select the optimum system microcontroller from the wide variety available. The ability to re-use existing architecture and firmware investments shortens development time, eliminates risks and reduces co...

Applications: The WB mode is similar to the FM mode, but to reduce the bandwidth the AM IF ampli- fier with the AM filter (bit 63 = 1) can be used. In WB mode the range of the integrated filter bandwidth control is shifted to lower bandwidth and the gain of the FM demodulator is increased.

Features: The CL21C270JCANNNC shunt regulator is available with three voltage tolerances (0.5%, 1.0% and 2.0%) and three package options (SOT-23-3, TO-92, 8SOIC). This allows the designer the opportunity to select the optimum combination of cost and performance for their application.

· CMLDM7003TTR

Vendor:3000   Package Cooled:SOT363   D/C:07+NOPB   

· C3216JB1H224K

· CXP83412-148Q

· CY7C245A-35WMB

Vendor:CYPREES   Package Cooled:05+   D/C:278   

Description: Notes: 4. CX1 must be placed within 0.7 cm of the HSDL-3612 to obtain optimum noise immunity. 5. In "HSDL-3612 Functional Block Diagram" on page 1 it is assumed that Vled and VCC share the same supply voltage and filter capacitors. In case the 2 pins are powered by different suppl...

Applications: The AT431 is low-voltage three-terminal adjustable voltage reference with specified thermal stability over applicable commercial temperature ranges. Output voltage may be set to any value between Vref (1.24V) and 12V with two external resistors (see Figure 2).

Features: freedom from amplifier bandwidth interaction. This allows frequency response peaking elements to be added, multiple input inverting summing circuits to have greater bandwidth, and low-power line drivers to meet the demanding require- ments of studio cameras and broadcast video. The outpu...

· CY7C245A35WMB

· CX24951-13

· CRCW120622611001RT1BC

· CY7C1049BV33-20ZXI

Description: used. The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be in...

Applications: The ICs power supply is separate from the detector inputs, allowing the CY7C1049BV33-20ZXI/CY7C1049BV33-20ZXI to be powered from a down-stream supply. Low supply current (4µA, typical) makes the CY7C1049BV33-20ZXI/CY7C1049BV33-20ZXI ideal for use in portable equipment. The CY7C1049BV33-2...

Features: A single external resistor is used to set the maximum LED current. The LED current can be adjusted by applying a PWM signal to the EN pin. For higher efficiency the CY7C1049BV33-20ZXI operates with pulse frequency modulation (PFM) control scheme when the sub-display is enabled. When Main ...

· CY62128-55SC

Vendor:CY   Package Cooled:SMD   D/C:96+   

Description: To achieve proper operation, an initial pause of 200 µs followed by a minimum of eight initialization cycles is required after full VCC level is achieved. These eight initialization cycles must include at least one refresh ( RAS-only or CBR ) cycle.

Applications: Host Bus Address Bit [15:1] : In 32 bit mode, H16_32=0, all host accesses are 32 bit wide. When H16_32=1, all host accesses are 16 bit wide. (Internal pull-up). A11, A10, A9, A8 has other definition in MII mode. Host Bus Address Bit11, when on-chip tranceiver is used, it is used in A[15...

Features: ESD PROTECTION All digital inputs of the CY62128-55SC incorporate on-chip ESD protection circuitry. This protection is designed to withstand 2.5kV (using the Human Body Model, 100pF and 1500Ω). However, industry standard ESD protection methods should be used when handling or storing...

· CY6212855SC

Vendor:CYPRESS   Package Cooled:SOP   D/C:01+   

· C4354-61201

Vendor:HYUNDAI   Package Cooled:QFP   D/C:00+   

Description: There are three sections of the C4354-61201: the input con- trol, counter and decode section; the nonvolatile mem- ory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch con...

Features: The C4354-61201 is an advanced AM/FM receiver with integrated fast PLL as a single-chip solution based on Atmels high-performance BICMOS II technology. The low-imped- ance driver at the IF output is designed for the A/D of a digital IF. The fast tuning concept realized in this part is based...

· CL-165-HR/YG

· CT213

Description: The UC3844B, UC3845B series are high performance fixed frequency current mode controllers. They are specifically designed for Off−Line and dc−dc converter applications offering the designer a cost−effective solution with minimal external components. These integrated circ...

Applications: This series of optically coupled isolators consist of a Gallium Arsenide infrared emitting diode and NPN silicon photo transistor mounted in a standard 8 pin SOIC package,which makes them ideally suited for high density applications with limited space.

Features: The onboard RISC processor enables the CT213 to handle complete I/O transactions with no intervention from the host. The CT213 RISC processor controls the chip interfaces; executes simultaneous, multiple input/output control blocks (IOCB); and maintains the required thread information f...

· CY7B994V-2BBXI

Description: The CY7B994V-2BBXI offers over current limit and full protection against reversed input polarity, reversed load insertion, and positive and negative transient voltage. On-Chip trimming adjusts the reference voltage to 1%. The IQ of this device flows into the load, which increases efficiency.

Applications: ARCHITECTURAL ADVANTAGES Simultaneous Read/Write operations - Data can be continuously read from one bank while executing erase/program functions in other bank - Zero latency between read and write operations Multiple bank architectures - Three devices available with different ban...

Features: The CY7B994V-2BBXI/CY7B994V-2BBXI 3-terminal regulators are easy to use and have all the protection features expected in high performance linear regulators. The devices are short-circuit protected, safe-area protected and provide thermal shutdown to turn off the regulators if the junction tem...

· CXA1279AS693

· CY7C1011CV33-20ZC

Description: This Schmitt-Trigger input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the Txd pin is asserted for longer than 300 µs. The input threshold voltage adapts to and follows the logic voltage swing defined by the applied Vlog...

Applications: Eighteen configurable outputs each drive terminated trans- mission lines with impedances as low as 50Ω while delivering minimal and specified output skews at LVTTL levels. The outputs are arranged in five banks. Banks 1 to 4 of four outputs allow a divide function of 1 to 12, while ...

Features: PC Power Supply Outputs Supervisory Circuitry Few External Components Over Voltage Protection for 3.3V, 5V and 12V Outputs Under Voltage Protection for 3.3V, 5V and 12V Outputs Over Current Protection for 3.3V, 5V and 12V Outputs Dual Over Current Portection for 12V Outputs(FAN7687) Fa...

· CR1/4223F

Description: The CY7C646xx uses a 12-MHz crystal for low EMI. An internal oscillator and PLL develops an internal 48-MHz clock for use by the USB Serial Interface Engine and the 8051 microprocessor. The 8051 can run at either 24 MHz or 48 MHz, controlled by a byte in the EEPROM attached to the I2C bus. ...

Applications: Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The CR1/4223FE is guaranteed to meet performance specifications from 0C to 70C. Specifications over the C40C to 85C operating temperature range are assured by design, characterization...

Features: Texas Instruments analog front-end chip, the CR1/4223F, is designed to greatly reduce the size and cost of G.SHDSL and HDSL2 application designs. It provides a transceiver as the line interface between the Digital Signal Processor (DSP) and the local loop. The CR1/4223F is designed to ha...

· C0805C105K9PAC922S

· CRCW080552R3F100RT1

· CA555T/883

Description: Note 7 Tested limits are guaranteed to Nationals AOQL (Average Outgoing Quality Level) Note 8 Design limits are guaranteed to Nationals AOQL but not 100% tested Note 9 The input bias currents are junction leakage currents which approximately double for every 10 C increase in the junction temp...

Applications: The XC7300 devices are available in plastic and ceramic leaded chip carriers, pin-grid-array (PGA), ball-grid-array (BGA), and quad flat pack (QFP) packages. Package options include both windowed ceramic for design proto- types and one-time programmable plastic versions for cost-ef...

Features: The ON Semiconductor CA555T/883 is a 4−bit, 4−port bus exchange switch. The device is CMOS TTL compatible when operating between 4.0 and 5.5 Volts. The device exhibits extremely low RON and adds nearly zero propagation delay. The device adds no noise or ground bounce to the sy...

· CY2292SL-1P6T

Description: The CY2292SL-1P6T operates on the falling edge of the reference. It operates with one of four possible input reference frequencies (8kHz, 1.544MHz, 2.048MHz or 19.44MHz). The frequency select inputs (FS1 and FS2) determine which of the four frequencies may be used at the reference input. A res...

Applications: regulator and the load is gained up by the factor of (1+R2/ R1), or the effective resistance will be, Rp(eff)=Rp*(1+R2/ R1). It is important to note that for high current applica- tions, this can represent a significant percentage of the overall load regulation and one must keep the path from ...

Features: This document specifies the MPEG-2 systems demultiplexer IC, CY2292SL-1P6TH, for use in MPEG-2 based digital TV receivers, possibly incorporating conditional access. Such receivers are to be implemented in, for instance, a Digital Video Broadcasting (DVB) set-top box, or Integrated Receiver...

· CA91L862A-50CEZ

· CSTCR6M00G53

Vendor:MURATA   Package Cooled:2x6   D/C:07+NOPB   

Applications: All contents of internal registers are loaded from EEPROM in MX98745. If system application prefers default setting instead of using contents from EEPROM, EEPROM operation can be disabled by setting EECONF to low. This feature faciliates system modulization appli- cation.

Features: 300/255 MIPs SLIMD™ DSP Architecture DirectX™ 5.0 3D Positional Audio Fat Labs Approved 64-Voice Wavetable Synthesis with Effects NetMeeting™ AECSTCR6M00G53 Hardware Acceleration Dolby® Digital ACSTCR6M00G53-3® (CSTCR6M00G53) High Quality Hardware Sample Rate CS...

· COPC820-TJK/Y

· CQS3861

· C8051F047-GQR

Vendor:Silabs   Package Cooled:TQFP64   D/C:07+   

· C8051F317

Vendor:SILICON   Package Cooled:QFN24   D/C:07+   

Description: Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposur...

Applications: Optimized for 3.3-V Operation 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation tpd = 5.3 ns Max at 3.3 V Suitable for Point-to-Point Applications Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 C 2000-V Human-Body Model (A114-B, Class...

Features: The C8051F317/C8051F317 SRAM integrates 524,288 x 36 and 1048,576 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The syn...

· CXA3592R

Vendor:SONY   Package Cooled:800   D/C:00+   

Description: Clock inputs CLK+ and CLK- may also be driven with positive referenced ECL (PECL) logic levels if the clock inputs are AC coupled. A single-ended ECL drive can also be used if the undriven clock input is connected to the ECL VTT voltage (nominally -1.3V).

Applications: When the FPGA is in Express or SelectMAP Mode, an external oscillator will generate the configuration clock that drives the PROM and the FPGA. After the rising CCLK edge, data are available on the PROMs DATA (D0-D7) pins. The data will be clocked into the FPGA on the follow- ing rising ...

Features: Notebook/Desktop/Server applications. High current POL converters. Low profile, high current power supplies. Battery powered devices. DC/DC converters in distributed power systems. DC/DC converter for Field Programmable Gate Array (FPGA).

· CDZT2R7.5B

Description: VCC to GND PGND to GND FB to GND SHDN to GND LX to GND Peak LX Current Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering 10s) Continuous Power Dissipation (TA = +70C) 6-PIN SOT23 Derates above +70C 6-PIN SOT23

Applications: This is a dual function pin. In the IDT Standard mode, the FFC function is selected. FFC indicates whether or not the FIFO2 memory is full. In the FWFT mode, the IRC function is selected. IRC indicates whether or not there is space available for writing to the FIFO2 memory. FFC/IRC is synchroni...

Features: High speed 8-bit ADC up to 110MHz conversion rate Support display resolution up to 1280x1024 at 60Hz refresh rate Low power dissipation (0.9W typical at 3.3V, 110MHz) 0.6~2.0V p-p analog input range 10k~1MHz CKREF locking range Full programmability via I2C interface Automatic scr...

· CXA1179N

Description: When the output load exceeds the current-limit threshold or a short is present, the TPS20xx limits the output current to a safe level by switching into a constant-current mode, and the overcurrent logic output is set to low. Continuous heavy overloads and short circuits will increase the po...

Applications: The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS and the conversion is also initiated at this point. There are no pipelined delay...

Features: Secondary Reference (Input). This is one of two (PRI & SEC) input reference sources (falling edge) used for synchronization. One of four possible frequencies (8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz) may be used. The selection of the input reference is based upon the MS1, MS2, RSEL, and ...

· CXP2201S

Description: Working Peak Reverse Voltage Range C 5.8 to 171 V Standard Zener Breakdown Voltage Range C 6.8 to 200 V Peak Power C 600 Watts @ 1 ms ESD Rating of Class 3 (>16 KV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5 µA Above 10 V UL 497B for Isola...

Applications: This family is a 4M bit dynamic RAM organized 1,048,576 x 4-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process design allow this device to achieve high performance and low power...

Features: The CXP2201S contains an 8-bit ADC (Analog-to-Digital Converter) responsible for monitoring the voltages and temperatures. The ADC converts the analog inputs, ranging from 0V to 4.096V, to 8-bit digital bytes. Thanks to the additional external components, the analog inputs are able to monitor...

· C5336

Vendor:XR   Package Cooled:DIP   D/C:02+   

Description: The IS24CXX is capable of 32-byte page-WRITE operation. A page-WRITE is initiated in the same manner as a byte write, but instead of terminating the internal write cycle after the first data word is transferred, the master device can transmit up to 31 more bytes. After the receipt of each...

Applications: - 2.1GB/s sustained data transfer rate - Separate control and data buses for maximized efficiency - Separate row and column control buses for easy scheduling and highest performance - 32 banks: four transactions can take place simul- taneously at full bandwidth data rates

Features: Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX C TA) / JA or the number given in Absolute Maximum Ratings, whichever is lower. For the C5336,...

· CY62128V25L-100SC

Vendor:CYPRESS   Package Cooled:SOP-32   D/C:2005+   

· CSTCR7M14G55A-R0

Description: TIE Circuit Reset (Input). A logic low at this input resets the Time Interval Error (TIE) correction circuit resulting in a realignment of input phase with output phase as shown in Figure 13. The TCLR pin should be held low for a minimum of 300 ns. This pin is internally pulled down to VSS.

Applications: • Synchronous Operation. • 2 Stage Pipelined operation with 4 Burst. • On-Chip Address Counter. • Self-Timed Write Cycle. • On-Chip Address and Control Registers. • VDD= 3.3V+0.3V/-0.165V Power Supply. • VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V...

· CRCW0603-2004FRT1

· C3216C0G3A100J

· CS4334-KSIR442

· CXA1726AS

Description: The Hynix HYM71V16M635HC(L)T8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The Hynix HYM71V16M635HC(L)T8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with...

Applications: Atmel has successfully translated existing FPGA/EPLD designs from most major vendors (Xilinx, Actel, Altera, AMD & Atmel) into our gate arrays. The design can be optimized for speed or power consumption, modified to add logic or memory or replicated for a pin-for-pin compat- ible, dr...

Features: The CXA1726AS is an audio/video encoder that performs video compression in conformance with the ISO/IEC 13818-2 (MPEG2 video) and ISO/IEC 11172-2 (MPEG1 video) standards and audio compression in conformance with the Dolby Digital * system. It also can multiplex the compressed audio and video...

· COP8CBE9IMT9

Description: Limits are 100% production tested at +25C. All temperature limits are guaranteed by design. Guaranteed by OUT line-regulation testing. OUT accuracy from nominal voltage. The MAX1725 is tested at VOUT = 1.5V, 2.5V, and 5V. When VOUT falls to 4% below its value at VIN = VOUT + 1V.

Applications: The LMV321/358/324 are the most cost effective solutions for the applications where low voltage operation, space sav- ing and low price are needed. They offer specifications that meet or exceed the familiar LM358/324. The LMV321/358/ 324 have rail-to-rail output swing capability and the i...

Features: The COP8CBE9IMT9 operates in forced continuous operation and provides tracking of another power supply rail. Forced continuous operation reduces noise and RF interference and provides excellent transient response. Fault protection is provided by an overcurrent comparator, and adjustable compe...

· C0805C561J5RACTU

· CY7C196-12VC

· CY7C4231V-35AC

Vendor:CYPRESS   Package Cooled:QFP   D/C:07/08+   

· CMP401GRU-REEL

Description: DESCRIPTION M63800FP is a seven-circuit output-sourcing Darlington transistor array. The circuits are made of PNP and NPN tran- sistors. This semiconductor integrated circuit performs high- current driving with extremely low input-current supply.

Applications: The 4538 may be triggered by either the positive or the negative edges of the input pulse. The duration and accuracy of the output pulse are determined by the external timing components Ct and Rt. The output pulse width (T) is equal to 0.7 Rt Ct. The linear design techniques guarant...

Features: Full Compliance with T1.413 Issue-2, ITU-T G.992.1 (G.dmt) and G.992.2 (G.lite). FDM and EC-based DMT Line Coding Data Rate: over 8Mbps for Downstream and 640 Kbps for Upstream. Reach: 6.7 Km (22Kft) with 24 AWG and 5.5 Km (18 Kft) with 26 AWG Supports Rate Adaptive Mode (steps of 32kbps) Ree...

· CAT24C02IP0

Vendor:DIP-8   Package Cooled:CSI   D/C:2004+   

Description: Product Family Pin Description Asynchronous 4 Page Read & Asynchronous Write Mode Truth Table Synchronous Burst Read & Asynchronous Write Mode Truth Table Synchronous Burst Read & Synchronous Burst Write Mode Truth Table Mode Register Setting according to Field of Function Mode R...

Applications: Further Features - Tip & Ring DC value in the make period in pulse dialing mode, - Line current variation detector for transfer, - Waiting melody generator, - Beep error generator, - Microcontroller interface, are essentialy software programming. Note : Throughout the applicatio...

Features: The CAT24C02IP0 is a CAN physical interface device, dedicated to automotive body electronic multiplexing applications. It operates in differential mode, allowing ground shifts up to 1,5V, reducing RFI disturbances. It offers very low standby current in sleep and standby mode operation and su...

· CX778A

Description: Disclaimer Alcor Micro Corp. reserves the right to change this product without prior notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without prior notice.

Applications: The 24xx128 supports a bi-directional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The bus must be con- trolled by a master device which generates the serial clock (SCL), co...

Features: The CX778A is a universal PAL device. It has eight independently configurable macrocells (MC0CMC7). Each macrocell can be configured as registered output, combinatorial output, combinatorial I/O or dedicated in- put. The programming matrix implements a program- mable AND logic array, wh...

· CRCW06034R99FKTA

· CP0603A0836LNTR/WTL0106300

· CF331034XCF331034XCF331034X

· C3216X5R0J335KT009N

Vendor:TDK   Package Cooled:SMD   D/C:2008+   

· CD45198CN

Description: Table 3.1 - LAN91C100FD Pin Requirements Table 5.1 - Internal I/O Space Mapping Table 7.1 - VL Local Bus Signal Connections Table 7.2 - High-End ISA or Non-Burst EISA Machines Signal Connectors Table 7.3 - EISA 32 Bit Slave Signal Connections Table 10.1 - 208 Pin QFP Package Parameters Table...

Applications: Internal signal monitor terminal Power supply terminal IF decoupling terminal for DC bias FLL decoupling terminal for DC bias FLL decoupling terminal for DC bias Internal signal monitor terminal Non connection 13MHz CLK PLL loop filter terminal Power supply terminal decoupling terminal fo...

Features: The external magnetic field component perpendicular to the branded side of the package generates a Hall voltage. The Hall IC is sensitive to magnetic north and south polarity. This voltage is converted to a digital value, processed in the Digital Signal Processing Unit (DSP) according t...

· CN3658N

· C1608JB1C393KT000N

· CA3048

Vendor:HARRIS   Package Cooled:N/A   D/C:222   

Description: Driver-Output Enable Time to Low Level Driver-Output Enable Time to High Level Driver-Output Disable Time from High Level Driver-Output Disable Time from Low Level Driver-Output Enable Time from Shutdown to Low Level Driver-Output Enable Time from Shutdown to High Level

Applications: FM Double-conversion System Integrated Second IF Filter with Software-controlled Bandwidth Completely Integrated FM Demodulator Soft Mute and Multipath Noise Cancellation Receiving Condition Analyzer AM Up/Down-conversion System AM Preamplifier with AGC and Stereo Capability 3-wire Bus Cont...

Features: The fan speed is measured by counting the number of the CLK pin period between the rising edges of two fan speed pulses on FG pin. In this way, we are actu- ally measuring the period of the fan speed. To avoid the cost of doing division to obtain the speed, this count number, N, is used in th...

· CD4011BCMX

Vendor:FSC   Package Cooled:SOP   D/C:00+   

Description: The protection circuitry receives current signals from shunts in positive and negative DC bus rail for earth/ground fault and short-circuit conditions. Any earth-fault signal is fed through an opto-isolator to the protection circuitry. Current signal from negative DC bus rail is provided ...

Applications: COM1/P15.6COM2/P15.5COM3/P15.4COM4/P15.3COM5/P15.2COM6/P15.1COM7/P15.0SEG87/COM8/P14.7SEG86/COM9/P14.6SEG85/COM10/P14.5SEG84/COM11/P14.4SEG83/COM12/P14.3SEG82/COM13/P14.2SEG81/COM14/P14.1SEG80/COM15/P14.0SEG0/P13.7SEG1/P13.6SEG2/P13.5SEG3/P13.4SEG4/P13.3SEG5/P13.2SEG6/P13.1SEG7/P13.0SEG8/P12.7SEG9...

Features: CD4011BCMXhe CD4011BCMX utilizes an external multiplier-accumulator or interpolator, connected to the system clock, to calculate the interpolated pixel value for each color. CD4011BCMXhe products of the original source image pixel values surrounding the remapped pixel location (interpolati...

· CY7C421A-15JC

· CK45-C2HD681K-VR

· CST-533HA

Vendor:China   Package Cooled:DIP   D/C:3.04   

Description: system is fail-safe; that is, the slaves will be continue operating should the master frequency be inter- rupted for any reason. The layout must be such that the synchronization output of the master device is connected to the synchronization input of each slave device. It is advisable t...

Applications: (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. (3) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

Features: The device supports low-power standby operation. When the reset input (RST#) is low, the differential input receivers are disabled, and undriven (floating) data, clock and reference voltage (VREF) inputs are allowed. In addition, when RST# is low all registers are reset, and all outputs are...

· C25-02N

Description: 120/277 VAC dual voltage input with surge-protect- ed, solid-state charging circuitry provides for a reliable charging system. The charging system is furnished with low voltage disconnect, AC lockout, brownout protection, AC indicator lamp and test switch.

Applications: Every Infiniium 54830 Series with MegaZoom is a deep-memory oscilloscope with up to a standard 2 Mpts of memory on each chan- nel. Now memory options are available to configure your scope with up to 128 Mpts to capture the longest waveforms without reducing sample rate.

Features: Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational amplifier circuits that now can be more easily implemented in single-supply-voltage systems. For example, the C25-02N can be operated directly from the standard 5-V supply that is used ...

· CA3021A

Description: The Hynix HYM76V8755HGT8 Series are 8Mx72bits ECC Synchronous DRAM Modules. The modules are composed of nine 8Mx8bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoup...

Applications: − 0 V to 2.5 V High Speed Parallel Interface 78 dB SNR and 88.5 dB THD at 3 MSPS Power Dissipation 85 mW at 3 MSPS Nap Mode (10 mW Power Dissipation) Power Down (10 mW) Internal Reference Internal Reference Buffer 8-/14-Bit Bus Transfer 48-Pin TQFP Package

Features: Technical requirements 5.1. Schematic 5.2. ZHP-r definition 5.3. Electrical specification 5.4. DC characteristics 5.5. Test methods 5.5.1 . Off-hook insertion loss 5.5.2 . Return loss 5.5.2.1. Complex* return loss with ATU-R 5.5.2.2. 600 ohm return loss with ATU-R

· CA3126M

Description: The TFP401/401A combines PanelBus circuit innovation with TIs advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.

Applications: The module contains watchdog circuitry which monitors input voltage, operating temperature and internal operating parameters. In the event that any of these parameters are outside of their allowable operating range, the module will shut down and PC will go low. PC will periodically go hig...

Features: Enhanced-Page-Mode Operation With xCAS-Before-RAS (xCBR) Refresh Long Refresh Period 512-Cycle Refresh in 8 ms (Max) 64 ms Max for Low Power With Self-Refresh Version ( CA3126MP) 3-State Unlatched Output Low Power Dissipation Texas Instruments EPIC™ CMOS Process All Inputs, Ou...

· CL385-2

Description: The HSDL-3002 can be shutdown completely to achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus producing very little photo- current even under very bright ambient light. Such features are ideal for battery operated handheld products.

Applications: The XP161A0390PR is an N-Channel Power MOS FET with low on-state resistance and ultra high-speed switching characteristics. Because high-speed switching is possible, the IC can be efficiently set thereby saving energy. The small SOT-89 package makes high density mounting possible.

Features: design, characterization and correlation with statistical process controls.The CL385-2I is guaranteed and tested to meet performance specifications from C 40C to 125C. Note 4: Output gate drive is enabled at this voltage. The GCL voltage will also determine driver activity. Note 5: Gate driv...

· CY101E3838-3JC

· C3783

· CS5322AD

· CX-83D87-33-GP

Description: 90% of Vcc MIN.; 10% of Vcc MAX. 15 pF is standard. Contact factory for heavier loads. Normal output when pin #1 is open (no connection); Normal output when pin #1 is at logic 1; High-Impedance Output when pin #1 is at logic 0. 16 mm tape, 178 mm, 254 mm or 330 mm reel: 1000 parts per reel. ...

Applications: AMDs Flash technology combines years of Flash memory manufacturing experience to produce the h i g h e s t l eve l s o f q u a l i t y, r e l i a b i l i t y, a n d c o s t effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling...

Features: The CX-83D87-33-GP is a wideband PLL FM demodulator, intended primarily for application in satellite tuners. The device contains all elements necessary, with the exception of external local oscillator tank and loop filter components, to form a complete PLL system operating at 403 or 48...

· CX83D87-33GP

Description: Input voltage range of 4.5VC24V Constant On-Time No compensation needed Maximum Load Current of 3A Switching frequency of 100 kHzC500 kHz Constant frequency across input range TTL compatible shutdown thresholds Low standby current of 12 µA 130 mΩ internal MOSFET switch

Applications: COMP (pin 9) and FB (pin 10) COMP and FB are the accessiable pins of the error amplifier. FB pin is the inverting input of the error amplifier and COMP pin is output of the error amplifier. These pins provide the compensation for the volt- age-control feedback loop of the converter.

Features: Figures 3 and 4, starting at time T4, depict the transitions from sleep states to the S0 wake state. Figure 3 shows the transition of the CX83D87-33GP/B from the S4/S5 state to the S0 state. Figure 4 shows how the CX83D87-33GP/B will transition from the S3 sleep state into S0 state. Figure 3 a...

· CX83D8733GP

Vendor:cyrix   Package Cooled:cyrix   D/C:dc93   

Description: +5V reference output. This low-drift zener voltage reference is necessary for setting the bipolar offset point of the input stage. This pin must be strapped to either Offset or Offset Adjust to allow the isolation amplifier to function. The reference is often useful for input signal condition...

Applications: • CX83D8733GP (5CX83D8733GP version) • Commercial temperature • Organization: 8,192 words 8 bits • Center power and ground pins • High speed - 12/15/20 ns address access time - 6/7/8 ns output enable access time • Low power consumption: ACTICX83D8733GP...

Features: Inter-Integrated Circuit Serial Ports (I2C0, I2C1). The C672x includes two inter-integrated circuit (I2C) serial ports. A typical application is to configure one I2C serial port as a slave to an external user-interface microcontroller. The other I2C serial port may then be used by the C672x ...

· CXA1252N3MSONYSOP95+

· CS82C371A

Vendor:INTERSIL?   Package Cooled:PLCC   D/C:00+   

Description: DMS (Data Management Software) allows systems to easily take advantage of the advanced architecture of the simultaneous read/write product line by allowing removal of EEPROM devices. DMS will also allow the system software to be simplified, as it will perform all functions necessary to m...

Applications: • 200µA supply current per amplifier • 3.7MHz bandwidth • Output swing to within 10mV of either rail • Input voltage range exceeds the rails • 3V/µs slew rate • 25nV/Hz input voltage noise • Competes with OPA340 and TLV2461 •...

Features: The MAX236X is a complete quadrature transmitter, including a quadrature modulator, variable- gain IF and RF amplifiers, an image-rejecting upconverting mixer, a dual RF and IF synthesizer, and a dual-band power amplifier (PA) driver amplifier. It is the ideal transmitter for TD-SCDMA becaus...

· C1206C104Z5UACTU

Description: In addition to data polling, the C1206C104Z5UACTU provides another method for determining the end of a program cycle. During the internal program or erase cycle, any consecutive attempts to read DQ6 will produce alternating 0's and 1's. When the program or erase cycle is completed, this toggl...

Applications: *This part may also be used in Pollution Degree 3 environments where the rated mains voltage is 300 V rms (per DIN VDE 0110). **Refer to the front of the optocoupler section of the current catalog for a more detailed description of VDE 0884 and other product safety requirements.

Features: The Hynix C1206C104Z5UACTU Series are 8Mx64bits Synchronous DRAM Modules. The modules are composed of four 8Mx16bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. Two 0.22uF and one 0.0022uF decoupl...

· CXD1217M-T1

· COP988

Vendor:700   Package Cooled:PLCC44   D/C:04+   

Description: Power Supply Return. External TTL Clock Input (See Table 2) An interrupt request is asserted by the TPUART when an enabled condition has occurred in the Status Register. This is an active low, open drain output. This pin has an internal pullup register. During processor to TPUART communicati...

Applications: RSTA/RSTB (Pins 6, 15): Card Socket. The RSTA/RSTB pins should be connected to the RST pins of the respective card sockets. The RSTA/RSTB signals are derived from the RSTIN pin. When a card is selected, its RST pin follows RSTIN. The RSTA/RSTB pins are gated off until VCCA/VCCB attain their c...

Features: COP988 is a battery backup IC. Switch that detect battery voltage and switch into back up power supply and 3-channel regulator are incorporated into a single chip. Current consumption is 15µA (Max.). This IC is perfect for portable appliances.

· CX11270-11Z

· CD4519BCN

Vendor:NS   Package Cooled:DIP   D/C:07+   

Description: NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V). 3. All VSS pins must be connected to ground supply. 4. Pac...

Applications: Note 1: VINPP is the signal swing before the external capacitor tied to the MUX inputs. Note 2: The -0.1V minimum is specified in order to accommodate black level signals lower than the external DC reference (clamp) voltage. Note 3: The VDCEXT-0.1V minimum is specified in order to accommod...

Features: The CD4519BCN and CD4519BCN consist of two line drivers, two line receivers, and a dual charge-pump circuit with 15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the electrical interface between an asynchronous communication controller and the...

· C4314T471

Vendor:KOA   Package Cooled:4X4-470R   D/C:05+   

Description: Notes: (1) This is a typical value. For the adjustment limits of a specific model consult the related application note on output voltage adjustment. (2) The Inhibit control (pin 1) has an internal pull-up to Vin, and if left open-circuit the module will operate when input power is applied. A...

Applications: For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our web site at www.ti.com. For other threshold votages, contact the local TI sales office for availability and lead time.

Features: When the squelch is off, the transmission path is enabled and data is fed into a waveform shaping circuit followed by the transmission output buffer. The waveform shaping function controls the output rise/fall time between 20nsec and 30 nsec, and minimizes the mismatch between the rise/fall...

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