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· GCM188R71C334KA37B

Vendor:MURATA   Package Cooled:.   D/C:09+   

· GL470UF10V8X15RAD

Vendor:capxan   Package Cooled:capxan   D/C:dc04   

Description: Development Kits are available from the following distributors: Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store at http://www.onfulfillment.com/cypressstore/ contains develop- ment kits, C compilers, and all accessories for PSoC develop- ment. Click on PSoC (Programmable Syst...

Applications: The GL470UF10V8X15RAD implements constant frequency 1.2MHz PWM current mode control. The GL470UF10V8X15RAD offers internal compensation that offers excellent transient response and output regulation performance. The high frequency operation saves board space by allowing small, low-profi...

Features: RATINGS (per diode) (at TA = 25C unless otherwise Limiting values Continuous reverse voltage Repetitive peak reverse voltage Repetitive peak forward current Forward current Non-repetitive peak forward current (per crystal) t = 1 µs t = 1 ms t=1s Storage temperature Junction t...

· GRM2167U1H681JZ01B

Vendor:MURATA   Package Cooled:SMD   D/C:07+   

· GMZJ13C

Vendor:ON   Package Cooled:SMD   D/C:06+   

· G7L-2ASERRIES

· GRM3192P2A151JZ01B

· GRM1555C1H7R1FZ01C

Vendor:MURATA   Package Cooled:.   D/C:06+   

· GJM0332C1E8R2FB01D

· GM81C1102

· GRM39C0G821J100

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GS8162Z18B-225

Vendor:GSI   Package Cooled:BGA   D/C:N/A   

· GRM155R71A683KA01DA016

Vendor:MURATA   Package Cooled:.   D/C:09+   

· GSC322-30M2150

Description: All synchronous inputs pass through input registers controlled by the rising edge of the clock. The clock input is qualified by the Clock Enable (CEN) signal, which when deasserted suspends operation and extends the previous clock cycle. Maximum access delay from the clock rise is 6.5 ns (133-...

Applications: Two non-inverting drivers provide buffering for the HSYNC and VSYNC signals from the video controller IC (SYNC1, SYNC2). These buffers accept TTL input levels and convert them to CMOS output levels that swing between Ground and VCC_SYNC, which is typi- cally 5V. Additionally, each drive...

Features: The GSC322-30M2150 is a Memory StickTM host interface bridge used between host microprocessor and Memory StickTM. The data width of host microprocessor can be 8-bit or 16-bit. GSC322-30M2150 can support synchronous or asynchronous type of host interface. It also supports DMA or Interrupt type ...

· GRM1881X2A680JZ01D

· G6AK-474P-ST-USDC5

· GS7266-474

Description: 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features. JC, the case temp is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.

Applications: Product Description/Features: • Low skew, Zero Delay Buffer • 1 to 13 SDRAM PC133 clock distribution • 1 to 6 pairs of DDR clock distribution • I2C for functional and output control • Separate feedback path for both memory mode to adjust synchronization. ...

Features: Supply voltage for the LNA, bias circuits, and control logic. External RF bypassing is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capaci- tors should connect immediately to ground plane. RF Input pin. This pin is...

· GRM1555C1H8R4WZ01D

· GRM2165C1H222J

Description: mode 4: fast mode, CS active (low) continuously, 16-clock transfer In this mode, CS is active (low) between serial I/O CLOCK transfers and each transfer must be exactly 16 clocks long. After the initial conversion cycle, CS is held active (low) for subsequent conversions; the rising edge of...

Applications: The Application Engineering Group is available to assist you with the application designs associated with the HSDL-3002 infrared transceiver module. You can contact them through your local sales representatives for additional details.

Features: CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the GRM2165C1H222J/GRM2165C1H222J features proprietary ESD protection circuitry, permanent dam...

· G6GN-2D-DC24V

· GTCR38-151M-Q10

· G6ZU-1F3VDC

· GRM155R71E682KA01DA01

Vendor:MURATA   Package Cooled:.   D/C:09+   

· GRM1552C1H6R8GZ01J

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· GRM1555C1H1R2JZ01C

Vendor:MURATA   Package Cooled:.   D/C:06+   

· GRM40R474K16V

· GC87C510AOSP20IP

Vendor:GENCORE   Package Cooled:DIP20   D/C:05+   

Description: The I/O and logic functions of the Configurable Logic Block (CLB) and their associated interconnections are established by a configuration program. The program is loaded either automatically upon power up, or on command, depending on the state of the three FPGA mode pins. In Master Serial...

Applications: The information in this document is preliminary and subject to change. This information has been carefully checked and is beleived to be entirely accurate. However, Fujitsu Limited and Fujitsu Microelectronics, Inc. assume no responsibility for inaccuracies.

Features: The GC87C510AOSP20IP is a semiconductor integrated circuit for the automatic selection and rectification of sync waveforms. The IC operates with synchronizing signals in three forms, that is, separate sync(positive or negative polarity, 1 to 5 Vp-p), composite sync (positive or negative pol...

· GQM2195C2A6R8DB01B

Vendor:MURATA   Package Cooled:SMD   D/C:08+   

· GR43-2W5R104M100

Description: The 3.3-volt device is fully accessible and data can be written and read only when VCC is greater than VPF. When VCC falls below VPF, access to the device is inhibited. If VPF is less than VBAT, the device power is switched from VCC to the internal backup lithium battery when VCC dr...

Applications: Maximum Input Power-- VDD+ 2.8V ESD Voltage (Human Body Model)200V Operating Temperature- 40 to + 85Degrees C Storage Temperature- 40 to + 150Degrees C (Note 1) Operation Of The HRF-ROC093XC Beyond Any Of These Parameters May Cause Permanent Damage.

Features: This circuit uses a Darlington pair topology with resistive feedback for broadband performance as well as stability over its entire temperature range. Internally matched to 50 Ohm impedance, the GR43-2W5R104M100 requires only DC blocking and bypass capacitors for external components.

· GT5J301

Description: Glass Passivated chip junctions Low Reverse Leakage Current Fast Switching for High Efficiency 150 Operating Junction Temperature Low Stored Charge Majority Carrier Conduction Low Forward Voltage , High Current Capability Plastic Material used Carries Underwriters Laboratory

Applications: Each channel has a mask bit associated with it which can be set to disable the incoming DREQ. Each mask bit is set when its associated channel produces an EOPN if the channel is not programmed for Auto initialize. Each bit of the 4-bit Mask register may also be set or cleared separately under ...

Features: The GT5J301 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient of 1ppm/C makes it possible to eliminate a system temperature cal...

· GAL16V8D-7LJNI

Vendor:LATTICE   Package Cooled:PLCC   D/C:2005   

· GRM3196T2A3R0CD01D

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· GRM2192P2A560JZ01B

· GRM0335C1E3R7C

· GRM40Y5V563Z50500T10

· GRM1883U2A101JZ01C

· GRM2197U2A471JZ01B

Vendor:MURATA   Package Cooled:CAPACITOR   D/C:06+   

· GRM1555C1H2R0GZ01J

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GRM42-6X7R223J25

· GRM219R11C474KA01B

· GRM0335C1E2R2GD01D

Vendor:MURATA   Package Cooled:.   D/C:06+   

· GRK40R472K50

· GRM31CR71C335KA01K

Vendor:MURATA   Package Cooled:SMD   D/C:07+08+   

· GRM31MF11A106ZF

Applications: • 1.27 mm (0.050 in.) pitch contact arrangement in two rows enables high-density mounting. • Connectors are available with 30 to 120 contacts. • Terminals are spaced in a four-row staggered arrangement (2.54 mm (0.100 in.) 1.905 mm (0.075 in.)) for easy PC board desig...

Features: Honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design. Honeywell does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its ...

· GR44-1R344K50-100(CKC35C1H344K-CNO)

Vendor:MURATA   Package Cooled:5650   D/C:05+   

Description: • Access times of 45, 55, and 70 ns • Low active power: 60 mW (typical) • Low standby power: 15 µW (typical) CMOS standby • Low data retention voltage: 2V (min.) • Available in Low Power (-L) and Ultra Low Power (-LL) • Output Enable (OE) and two Ch...

Applications: Voltage of 1.8 V High Efficiency Boost, SEPIC or Flyback (Buck-Boost) Topologies Drives External FETs for High-Current Applications Up to 2-MHz Oscillator Synchronizable Fixed Frequency Operation High-Efficiency Low-Power Mode High-Efficiency at Very Low-Power with Programmable Variable ...

Features: This document describes the GR44-1R344K50-100(CKC35C1H344K-CNO) Series common hardware specifications. This document is applied to the GR44-1R344K50-100(CKC35C1H344K-CNO) up to the GR44-1R344K50-100(CKC35C1H344K-CNO). The individual function is described in the each data sheet. Please refer to ...

· GRM2167U1H220JZ01B

Vendor:MURATA   Package Cooled:SMD   D/C:07+   

· G508A-04

Vendor:TQFP   Package Cooled:NETVOX   D/C:2005+   

Description: FullCAN interface with 15 message buffers complaint to CAN specification 2.0B active Versatile Timer Unit with four subsystems (VTU) Two analog comparators Integrated WATCHDOG logic I/O Features Up to 56 general-purpose I/O pins (shared with on-chip peripheral I/O pins) Programmabl...

Applications: Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage...

Features: Low distortion operation is ensured by the high gain bandwidth product (200MHz) and slew rate (850V/µs), making the G508A-04 an ideal input buffer stage to 3V and 5V CMOS converters. Unlike other low-power, single-supply amplifiers, distortion performance improves as the signal swin...

· GRM39R2H220J50

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GRM31MR71H684KA88B

· GRM39B152K50PT

· GAL20V8B25LJI

Vendor:14   Package Cooled:LATTICE   D/C:02+   

Description: The LV221A devices are dual multivibrators designed for 2-V to 5.5-V VCC operation. Each multivibrator has a negative-transition-triggered (A) input and a positive-transition-triggered (B) input, either of which can be used as an inhibit input.

Applications: The AT91X40 Series features a direct connection to off-chip memory, including Flash, through the fully programmable External Bus Interface (EBI). An eight-level priority vectored interrupt controller, in conjunction with the Peripheral Data Controller signifi- cantly improve the real-time p...

Features: The GAL20V8B25LJI allows designers a great deal of flexibility in selecting external components and topology to implement their specific power-supply needs. With appropriate heat sinking, the designer can build a regulator with as much current capability as allowed by the external MOSFET an...

· GAL20V8B-25LJI

Description: 1. Test conditions: T = 25º C, Supply Voltage = +6 V, Device Voltage = 5.0 V, Rbias = 16.5 , Icc = 70 mA typical, 50 System. 2. 3OIP measured with two tones at an output power of +4 dBm/tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP usin...

Applications: The CS5340 is a complete analog-to-digital converter for digital audio systems. It performs sampling, analog-to- digital conversion, and anti-alias filtering, generating 24-bit values for both left and right inputs in serial form at sample rates up to 200 kHz per channel.

Features: Introduction The GAL20V8B-25LJI is a fixed frequency, voltage mode syn- chronous controller and consists of a precision refer- ence voltage, an error amplifier, an internal oscillator, a PWM comparator, 1A peak gate driver, soft-start and shutdown circuits (see Block Diagram). The output volt...

· GS9802

· GCM1885C2A680JA16C

· G6B-1114P-12V

Vendor:OMRON   Package Cooled:DIP   D/C:07+   

Description: FUNCTIONAL DESCRIPTION The test set operates in one of three basic modes These are (1) Bias Current Test (2) Offset Voltage Offset Current Test and (3) Transfer Function Test In the first two of these tests the amplifier under test is exercised throughout its full common mode range In all...

Applications: The detection is done based on the ratio of two variable capacitors. These capacitors can be the parasitic capacitances of a small conductive ball placed on a cavity in the pcb. As the pcb is rotated in its lenghty direction, the ball is running forwards and backwards on the pcb. Copper track...

Features: The G6B-1114P-12Vx step-up, regulated charge pumps generate a 3.3-V 4% output voltage from a 1.8-V to 3.6-V input voltage. These devices are typically powered by two alkaline, NiCd, or NiMH battery cells or by one primary lithium MnO2 (or similar) coin cell and operate down to a minimum sup...

· G5RL-14DC5V

Vendor:OMRON   Package Cooled:2008   D/C:15   

· GRM39X7R223K25

Vendor:MURATA   Package Cooled:.   D/C:09+   

Description: Four package terminals are used as inputs to set the default value for four configuration status bits in the self-ID packet and are tied high through a 1-kΩ resistor or hardwired low as a function of the equipment design. The PC0CPC2 terminals are used to indicate the default power-cl...

Applications: Notes: 1. PD indicates an internal pull-down and PU indicates an internal pull-up. 3 indicates a three-level input buffer 2. A bypass capacitor (0.1µF) should be placed as close as possible to each positive power pin (< 0.2). If these bypass capacitors are not close to the pins thei...

Features: The GRM39X7R223K25 is a bipolar, monolithic SPDT video switch incorporating fast control logic. The analog signal path is characterised by low differential gain, low differential phase and low insertion loss, coupled with a 0.1 dB bandwidth of typically 100 MHz into a 10 pF load, using an ext...

· GRM0335C1E6R3DD01B

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· GBLA-FAA

Vendor:AMIS   Package Cooled:PLCC44   D/C:04+   

· G96-650-C1

Vendor:NVIDIA   Package Cooled:N/A   D/C:07+   

· GRM31M7U1H822JZ01B

· GRM32ER60J476ME20K

Vendor:MURATA   Package Cooled:SMD   D/C:07+08+   

Description: Isolation Barrier The isolation barrier consists of two transformers and three opto couplers. One transformer transmits the signal from the input side to the output side. The other transmits power from the output side to the input side. The opto-couplers are used to isolate the logic used...

Applications: Similar To Industry Standard LT137AHV Adjustable Output Voltage Built In Thermal Overload Protection Short Circuit Current Limiting Available In Isolated and Non-Isolated Package Maximum Output Voltage Tolerance Is Guaranteed To 1% Available Hi-Rel Screened

Features: The GRM32ER60J476ME20K6/GRM32ER60J476ME20K8/GRM32ER60J476ME20K9 are IF receivers designed for dual-band, dual-mode, and single-mode N-CDMA and W-CDMA cellular phone systems. The signal path consists of a variable-gain amplifier (VGA) and I/Q demodulator. The devices feature guaranteed +2.7V o...

· GRM155R71H222J(LF)

· G697L263T1U/MARK697AX

Vendor:GMT   Package Cooled:SOT23-5   D/C:05+   

· GQM2192C2A9R1DB01J

Vendor:MURATA   Package Cooled:SMD   D/C:08+   

· GRM40COG330G50

· GRM3197U2A182JZ01D

Vendor:MURATA   Package Cooled:SMD   D/C:07+08+   

· GP1UC102

Vendor:SHARP   Package Cooled:CLCC-6   D/C:08+   

· GSOT03C-GS08-LF

· GRM1885C1H180GA01D

· GD74LS07

Description: The ZZ input pin is an asynchronous input. Asserting ZZ places the SRAM in a power conservation sleep mode. Two clock cycles are required to enter into or exit from this sleep mode. While in this mode, data integrity is guaranteed. Accesses pending when entering the sleep mode are not conside...

Applications: Die Standardlieferform von Serientypen beinhaltet eine untere bzw. eine obere Familiengruppe oder mindestens zwei Einzelgruppen. In einer Verpackungseinheit / Gurt ist immer nur eine Helligkeitsgruppe enthalten. Die technologiebedingte Helligkeits-Streuung der heutigen LED-Herstellprozesse be...

Features: When the power supply of the TSB41AB3 is off while the twisted-pair cables are connected, the TSB41AB3 transmitter and receiver circuitry presents a high-impedance signal to the cable and does not load the TPBIAS voltage at the other end of the cable.

· GRM36COG560J50

Description: 7) Optional: Another method of determining gain is by using a network analyzer. This has the advantage of displaying gain vs. a swept frequency band, in addi- tion to displaying input and output return loss. Refer to the user manual of the network analyzer for setup details.

Applications: Logic Output. REGRM36COG560J50ET goes low for 200 ms when triggered. It can be triggered either by VCC being below the reset threshold or by a low signal on the manual reset (MR) input. REGRM36COG560J50ET will remain low whenever VCC is below the reset threshold (4.65 V in GRM36COG560J50, 4....

Features: The GRM36COG560J50 and GRM36COG560J50 are monolithic high-voltage, high-current Darlington transistor arrays. Each consists of seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The collector-current rating of each Da...

· GRM188B11H682KA01J

Vendor:MURATA   Package Cooled:SMD   D/C:08+   

· GRM39COG300J50-500/PT85

Description: This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Co...

Applications: A low-power battery-backup refresh mode that requires less than 300-µA (GRM39COG300J50-500/PT85P) or 500-µA (GRM39COG300J50-500/PT85P) refresh current is available on the low-power devices. Data integrity is maintained using CBR refresh with a period of 125 µs while holding...

Features: When CE1 is High or CE2 is Low the device enters standby mode. The standard GRM39COG300J50-500/PT85 is guaranteed not to exceed 11.0 mW power consumption in standby mode, and typically requires only 250 µW; it offers 2.0GRM39COG300J50-500/PT85 data retention with maximum power of 120 &m...

· GRM39CH080D200

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GRM1552S1H100JZ01B

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GD4013BD

Description: The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted b...

Applications: Notes: 1. Refers to transition on noninverting output. 2. While the pulse skew is almost constant over frequency, the duty cycle error increases at higher frequencies. This is due to the formula: duty cycle=twH/tc, were the cycle (tc) decreases as the frequency goes up.

Features: The RSET resistor is part of the high speed output circuit of the GD4013BD. The resistor should be placed as close as possible to the RSET pin. In addition, PCB capacitance should be minimized at this node by removing the PCB groundplane beneath the RSET resistor and the RSET pin.

· GRM1552C1H4R9GZ01J

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· GRM0332C1E5R5DD01B

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· G2R-2-AC120V

· GRM033B11A562KA01DA01

Vendor:MURATA   Package Cooled:.   D/C:09+   

· GJM1554C1H1R1JB01D

· GRM155F11H472Z

· GRM1552C1H8R3BZ01C

Vendor:MURATA   Package Cooled:SMD   D/C:06+   

· GRM42-2X7R106K16D550

Vendor:MURATA   Package Cooled:06+   D/C:100133    

· GRM1552C1H391JA01J

Vendor:MURATA   Package Cooled:.   D/C:2008+   

· GRM1555C1H7R1FZ01B

Vendor:MURATA   Package Cooled:SMD   D/C:2008+   

· GM4JV81231AE

Description: 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the noCload dynamic power consump...

Applications: The PKEU is capable of performing many advanced mathematical functions to support RSA and Diffie-Hellman as well as ECC in both F 2 m (polynomial-basis) and F p. The accelerator supports all levels of functions to assist the host microprocessor in performing its desired cryptographic fu...

Features: The gain error in the GM4JV81231AE ADCs, is defined as the difference between the measured ADC output code (minus the offset) and the ideal output code - see Current Channel ADC & Voltage Channel ADC. The difference is expressed as a percentage of the ideal code.

· GRM2163U1H391JZ01C

Vendor:muRata   Package Cooled:SMD   D/C:06+   

· GRM39CH200J50D500

Vendor:MURATA   Package Cooled:06+   D/C:105000    

· GRM40B104K50

Vendor:MURATA   Package Cooled:06+   D/C:08+   

· GS9064617

· GJM0332C1E8R7FB01B

· GS816036T-133

Description: † All typical values are at VCC = 2.5 V, TA = 25C. ‡ The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. The bus-hold circuit can source at least the minimum hig...

Applications: Intersil CA3089 is a monolithic integrated circuit that pro- vides all the functions of a comprehensive FM-IF system. The block diagram shows the CA3089 features, which include a three-stage FM-IF amplifier/limiter configuration with level detectors for each stage, a doubly-ba...

Features: The GS816036T-133ECGS816036T-13379E and GS816036T-1330ECGS816036T-1333E 15kV ESD-protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. A low-v...

· GRM39C0G241J50D500

Vendor:MURATA   Package Cooled:06+   D/C:120000    

· GC4015PB

· GRM155R61A394KA01D

· GS74104J-15I

· GRM31M2S1H122JZ01K

· GRM1552R1H150JZ01D

Vendor:MURATA   Package Cooled:.   D/C:2008+   

Description: Common I O for reduced pin count Four operation modes shift left shift right parallel load and store Separate continuous inputs and outputs from Q0 and Q7 allow easy cascading Fully synchronous reset TRI-STATE outputs for bus oriented applications

Applications: Write ready. In the write-read mode with CS low, the conversion is started on the falling edge of the WR input signal. The result of the conversion is strobed into the output latch after the internal count-down delay time, td(int), provided that the RD input does not go low prior to this ti...

Features: Read and Erase/Write Instruction Sequences The GRM1552R1H150JZ01D and GRM1552R1H150JZ01D have two basic instruc- tion sequences: Read and Erase/Write. Unlike some other Flash technologies, the erase and write operations of the GRM1552R1H150JZ01D and GRM1552R1H150JZ01D are performed togethe...

· GRM1881X1H221J

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