Current position: Home > Products > Index J > Page 65
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9 All

Records matching criteria: 31968

Page: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 178 152 82 208 149 92 177 241 135 133 54 290 138 275 33 120 114 52 211 138 123 85 198 179 319 134 285 297 50 69 160 292 301 40 100 68 249

· JANTX2N115

· JX2N6056

· JAN2N6424

· J2N143

· JTX2N6211

· JM39003/01-6039JM39003/01-6039JM39003016039

· J147

Vendor:LT   Package Cooled:04+   D/C:QFN   

Applications: Table 1, column 2, IRHN8450. The values in Table 1 will be met for either of the two low dose rate test circuits that are used. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison.

Features: Wavelengths of light less than 4000 Angstroms begin to erase the J147 in the windowed package. For this reason, an opaque label should be placed over the window if the EPROM is exposed to sunlight or fluorescent lighting for extended periods of time.

· JX2N6895

Description: MAX 7000A devices contain from 32 to 512 macrocells that are combined into groups of 16 macrocells, called logic array blocks (LABs). Each macrocell has a programmable-AND/fixed-OR array and a configurable register with independently programmable clock, clock enable, clear, and preset func...

Applications: The Direct Rambus RIMM module consists of 288 Mbit Direct Rambus DRAM (Direct RDRAM™) devices. These are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventio...

Features: JX2N6895: Undervoltage Threshold Input. When the voltage at the UV pin is less than the VUVL threshold, the GATE pin is immediately pulled low by an internal 100µA current pull-down. The UV pin is also used to cycle the device off and on to reset the circuit breaker. Taken together, t...

· JM38510/3050BCB

· J2N2123

· JX2N5887

Vendor:MOT/RCA   Package Cooled:TO-66   D/C:08+   

· JAN2N3763

Vendor:NES   Package Cooled:CAN3   D/C:original stok   

Description: Agilents ACMD-7401 duplexers provide high RF performance in a very small package. However, in order to achieve all the perfor- mance available from the duplexer, care must be taken in the design of the board onto which it is mounted. The purpose of this information is to provide Agilents ...

Applications: Notes: (1) See SOA curves or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of RSET . The stated limit is unconditionally met if R SET has a tolerance of 1 % with 100 ppm/C or better temperature stability. (3) A ...

Features: Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 300ps Internal feedback allows outputs to be synchronized to the clock input 5V tolerant input* Spread spectrum clock ready Operates at 3.3V VDD Packaging (Pb-free & Green available): ...

· JES01-9C70-E

Vendor:SANYO   Package Cooled:PB-FREE   D/C:05+   

Description: • Automatic power-down • Expandable data bus to 32/36 bits or more using Mas- ter/Slave chip select when using more than one device • On-chip arbitration logic • Semaphores included to permit software handshaking between ports • INT flag for port-to-port comm...

Applications: An infrared emitter constructed of AlGaAs that emits at 890 nm operates efficiently with drive current from 500 µA to 40 mA. Best linearity can be obtained at drive currents between 5.0 mA to 20 mA. Its output flux typically changes by - 0.5 % /C over the above operational current...

Features: The Digital Interface part The digital part of the JES01-9C70-ES can be di- vided in 3 sections: The data interface converts the multiplexed data from/to the DMT signal processor into valid representation for the TX DAC and RX ADC. It performs also the error correction mechanism ne...

· J2N4908

Vendor:MOT   Package Cooled:TO-3   D/C:08+   

· JMK105F474ZV

Vendor:TAIYO   Package Cooled:06+   D/C:200137    

· JM38510/11803SXA

Description: OBDIn (pin11) The OBD data is input to this pin, with a high logic level representing the active state of the OBD K line. No Schmitt trigger input is provided, so the OBD signal should be buffered to minimize transition times for the internal CMOS circuitry.

Applications: Pericom Semiconductors PI49FCT series of logic circuits are produced using the Companys advanced submicron CMOS technology to achieve fast speed, low skew, fast slew rate, and low propagation delay for most computing and communication applications.

Features: JM38510/11803SXAhe JM38510/11803SXA, a pin-compatible replacement for the JM38510/11803SXAMC2302, is a high-speed self-sequencing address genera- tor which supports image manipulations such as rotation, rescaling, warping, filtering, and resampling. It remaps the pixel locations of a...

· JANTX2N5888

Vendor:MOT/RCA   Package Cooled:TO-66   D/C:08+   

· JANTX2N5857

· JAN2N770

Description: Product Term Assignment Each Macrocell sum-of-product OR gates can be expanded using the Fast Function Block product term assignment scheme. Product-term assignment transfers product-terms in increments of four product-terms from one Macrocell to the neighboring Macrocell (Figure 4). Com...

Applications: The JAN2N770 (4 Pin DIP) is robust, ideal for telecom and ground fault applications. It is a SPST normally open switch (1 Form A) that replaces electromechan- ical relays in many applications. It is constructed using a GaAs LED for actuation control and an inte- grated monolithic die fo...

Features: • Single supply operation down to 1.8V • Low power CMOS technology - 1 mA active current typical - 5 µA standby current (typical) at 3.0V • ORG pin selectable memory configuration - 1024 x 8 or 512 x 16-bit organization (JAN2N770) - 2048 x 8 or 1024 x 1...

· JMX-31M205B

· JPS-2-4

Vendor:MINI   Package Cooled:N/A   D/C:N/A   

Description: NOTES: 1. See Test Conditions under TEST CIRCUITS AND WAVEFORMS. 2. This parameter is guaranteed but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switc...

Applications: Fully Integrated VCC and Vpp Switching for 3.3 V, 5 V, and 12 V (no 12 V on JPS-2-4) Meets Current PC Cardt Standards Vpp Output Selection Independent of VCC 12-V and 5-V Supplies Can Be Disabled TTL-Logic Compatible Inputs Short-Circuit and Thermal Protection 24-Pin HTSSOP, 24- or 30-Pin S...

Features: The JPS-2-4s external port provides the proces- sors interface to off-chip memory and peripherals. The 4G word off-chip address space is included in the JPS-2-4s unified address space. The separate on-chip busesfor PM addresses, PM data, DM addresses, DM data, I/O addresses, and I/O data...

· JX2N2850

· JX2N6286

Vendor:MOT   Package Cooled:TO-3   D/C:08+   

· JQX-13F-2Z2-D110

· JAN2N1480

Description: In a multiple supply, fault tolerant, redundant power distribution system, paralleled power supplies contribute equally to the load current through various power sharing schemes. Regardless of the scheme, a common design practice is to include discrete ORing power diodes to protect again...

Applications: In order to allow maximum flexibility for system designers, the CINT# of the PC card 32-bit may be programmed to steer to either INTA# or INTB# of the PCI bus. Further, the interrupts may be programmed to route through the bridge to either PCI INT lines or IRQ interrupts on the ISA bus.

Features: The JAN2N1480/925 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The JAN2N1480/925 is based on a high performance processor architecture that executes instructions in two to four clocks...

· J2N115

· JANTX1N6467A

· JANTX2N5218

· JAN2N3681

Description: where VREF = 0.6V The maximum output current should be limited to less than 10A. The usable output voltage range for the EV kit is +8V to +15V. Additionally, ICs U3, U2, and resistor R19 limit the minimum output voltage (VOUT) to +2.6V. For voltages outside the above range, a different turns ...

Applications: The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re- export of this product from a country other than Japan may also be prohibi...

Features: Power Supply for the RF Section. Decoupling capacitors to the ground plane should be placed as close as possible to this pin. V DD1 should have a value of between 2.7 V and 5.5 V. V DD1 must have the same potential as VDD2. Power Supply for the RF Charge Pump. This should be greater than or ...

· JAN2N99

· JANTX2N41

· JANTX2N6483

Description: (VCC = +3.0V to +3.6V, CL = 10pF, differential input voltage |VID| = 0.2V to 1.0V, common-mode voltage VCM = |VID/2| to 2.4V - |VID/2|, input rise and fall time = 1ns (20% to 80%), input frequency = 100MHz, TA = -40C to +85C. Typical values are at VCC = +3.3V, VCM = 1.2V, |VID| = 0.2V, TA = +25...

Applications: CA/CB/CC High-side connections for the bootstrap capaci- tors, positive supply for high-side gate drive. The bootstrap capacitor is charged to approximately VCCOUT when the associated output SA/SB/SC terminal is low. When the output swings high, the voltage on this terminal rises with th...

Features: The JANTX2N6483 is a high-speed 16K x 36 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provi...

· JX2N5685

· JAN2N1854

· JM38510/30102B2A

Description: VBIAS (VCC, V BS1,2,3) = 15V, VS0,1,2,3 = VSS and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3 . The VO and IO parameters are referenced to VS0,1,2,3 and are applicable to t...

Applications: Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such i...

Features: Operation of the devices described herein with conditions above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of...

· JM38510/00401BCB

Vendor:MOTOLOR   Package Cooled:80+81+   D/C:DIP14   

Description: The software Block Erase mode is initiated by issuing the specific six-word loading sequence, as in the Software Data Protect operation. After the loading cycle, the device enters into an internally timed Erase cycle. (See Table 3 for specific codes, Figure 5-2 for the timing waveform, and Fig...

Applications: The JM38510/00401BCB provides outputs from the internal current sense resistor (pin 7& 8). These outputs can be directly wired to the C.S. +, C.S.- (pin 28 & 27) inputs. The outputs can also be used in external current limit circuitry. Figure 1 shows a typical connection of the JM38...

Features: The serial bits are clocked into the JM38510/00401BCB input registers on the falling edge of an internally generated bit clock (rising edge aligned with rising edge of WDCLK) that runs at 64Fs when FORMAT is low (32 bits/frame), or 48Fs when FORMAT is high (24 bits/frame). The input da...

· JX2N4425A

· JANTXV2N5109

· JAN2N2625

· JANTX2N6580

Description: ICC and ICC are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.13 ICC and ICC are the average currents required for the duration of the respective STORE cycles (tSTORE ) .24 E VIH will not produce standby current levels until any nonvol...

Applications: Note 10: If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when VDD...

Features: The JANTX2N6580 combines these high performance features with its 0.05% settling time of 15ns and its 100mA drive capability to provide high-speed, high-resolution A/D and D/A converter sys- tems with an attractive solution for driving and buffering. Wide dynamic range systems such as rad...

· JV2N4948

Description: NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 3000 pieces of OPA680...

Applications: Note 1: Over-temperature limits are guaranteed by design, not production tested. Note 2: This is the minimum time RESET must be held low by an external pulldown source to set the active pullup flip-flop. Note 3: Measured from RESET VOL to (0.8 x VCC), Open Circuit Output. Note 4: Watchdog ti...

Features: Notes: 1: VC1 2.4 ,VC2 2.4, VM 2.4, VC1 5.0, VC2 5.0, VC3 5.0, VM13 5.0, VM2 5.0 = 3.3 Volts, T=25C, PA is constantly biased, 50Ω system. VL adjusted for either 2.4 or 5 GHz operation. 2: Percentage includes system noise floor of EVM=0.8%. 3: Not measured 100% in production. 4: POUT ...

· JM38510/65602B3A

· JANTX2N6672

Description: Current Address Register Each channel has a 16-bit Current Address register. This reg- ister holds the value of the address used during DMA transfers. The address is automatically incremented or dec- remented after each transfer and the intermediate values of the address are stored in the Cur...

Applications: o 8-Channel Single-Ended or 4-Channel Differential Inputs o Single +5V or 5V Operation o Low Power: 1.5mA (operating mode) 2µA (power-down mode) o Internal Track/Hold, 133kHz Sampling Rate o Internal 4.096V Reference (MAX186) o SPI-, QSPI-, Microwire-, TMS320-Compatible 4-Wi...

Features: This INFINEON module is an industry standard 144 pin 8-byte Synchronous DRAM (SDRAM) Small Outline Dual In-line Memory Modules (SO-DIMM) which is organised as 64Mx64 high speed array in two memory banks designed for use in non-parity applications. These SO-DIMMs use back side protected P-TF...

· JRC12904

Vendor:JRC   Package Cooled:MSOP-8   D/C:07+   

Description: The CY22050 has a single PLL driving 6 programmable output clocks. The output clocks are derived from the PLL or the reference frequency (REF). Output post dividers are available for either. Four of the outputs can be set as 3.3V or 2.5V, for use in a wide variety of portable and low-power app...

Applications: All units in these Renesas MultiMediaCards are clocked by an internal clock generator. The Interface driver unit synchronizes the DAT and CMD signals from external CLK to the internal used clock signal. The card is controlled by the three line MultiMediaCard interface containing the signals: ...

Features: The read or write mode is selected through the write-enable (W) input. A logic high on W selects the read mode and a logic low selects the write mode. W can be driven from standard TTL circuits (JRC12904 / P) or low-voltage TTL circuits (JRC12904 / P) without a pullup resistor. The data inp...

· J11.3300.01

Description: The two PWM controllers that regulate the system main 5V and 3.3V voltages are implemented with synchronous- rectified buck converters. Synchronous rectification and hysteretic operation at light loads contribute to high efficiency over a wide range of input voltage and load variation. Effici...

Applications: Notes: 1. The luminous intensity is measured on the mechanical axis of the lamp package. 2. The optical axis is closely aligned with the package mechanical axis. 3. The dominant wavelength, ëd, is derived from the CIE Chromaticity Diagram and represents the color of the lamp. 4. 1/2 ...

Features: The J11.3300.01 is a true one-port, surface-acoustic-wave (SAW) resonator in a surface-mount, ceramic case. It provides reliable, fundamental-mode, quartz frequency stabilization of fixed-frequency transmitters operat- ing at 318 MHz. This SAW is designed for AM transmitters remote control and...

· JRC3500

Vendor:JRC   Package Cooled:SOP   D/C:00   

Description: A common application for HyperPHY is the high-speed switch used in broadband networking and in local area networks. Thus, it includes routers, LAN switches, ATM switches, digital cross-connects, ADMs, and DWDM systems. A typical scenario is shown in Figure 2 for a SONET or DWDM system, wh...

Applications: Operating temperature range (B version) is −40C to +85C. AC coupling ensures AVDD/2 bias. See Figure 13 for typical circuit. 3Guaranteed by design. Characterized to ensure compliance. 4TA = 25C; AVDD = DVDD = 3 V; N = 64; RFIN = 7.5 GHz. 5The synthesizer phase noise floor is estima...

Features: Generates a Regulated Auxiliary Output in Isolated DC/DC Converters 0.8V 1.5% Accurate Voltage Reference Dual N-Channel MOSFET Synchronous Drivers High Switching Frequency: Up to 500kHz Programmable Current Limit Protection Programmable Soft-Start Automatic Frequency Synchronization Small...

· JANTXV2N3313A

· JM38510/01405BEB

Vendor:S,MOT   Package Cooled:78+   D/C:06+   

Description: A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconduc- tor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data...

Applications: NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the ou...

Features: The JM38510/01405BEBD is assembled in a 16 lead plastic packaage which has 4 center pins connected to- gether and used for heatsinking The JM38510/01405BEBDD is assembled in a 20 lead surface mount which has 8 center pins connected to- gether and used for heatsinking.

· JLC1565BFA

Description: • 400 and 600 V high-withstanding-voltage series of products • The non-repetitive withstanding voltage is a high 700 V, making it easy to harmonize the rise voltage of the surge absorber. • High-sensitivity thyristor (IGT = 3 to 50 µA) • Employs flame-retardant ...

Applications: The HCPL-7800 high CMR isolation amplifier provides a unique combination of features ideally suited for motor control circuit designers. The product provides the precision and stability needed to accurately monitor motor current in high- noise motor control environ- ments, provi...

Features: TAOperating free-air temperature070_C NOTE 4: The RESET input of the device must be held at valid logic voltage levels (not floating) to ensure proper device operation. The differential inputs must not be floating unless RESET is low. Refer to the TI application report, Implications of Slow...

· J2N1330

· JAN2N1347

· JAN2N1378

· JAN2N2349

· JD54F365BFA

· JTX2N3910

· JANTX2N6314

Description: The QUICC is 32-bit controller that is an extension of other members of the TS68300 family. Like other members of the TS68300 family, the QUICC incorporates the inter- module bus (IMB). The TS68302 is an exception, having an 68000 bus on chip. The IMB provides a common interface for all mod...

Applications: The number formed by the full offset least significant bit register and full offset most significant bit register is referred to as m and determines the operation of PAF. PAE is synchronized to the LOW-to-HIGH transition of WCLK by one flip-flop and is set LOW when the number of unread wor...

Features: The Hynix JANTX2N6314 Series are 32Mx72bits ECC Synchronous DRAM Modules. The modules are composed of eighteen 32Mx4bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF dec...

· JRC2103

Description: PWM Capability up to 60 kHz with Duty Cycle from 5% to 100% Very Low Standby Current Slew Rate Control with External Capacitor Overcurrent and Overtemperature Protection, Undervoltage Shutdown and Fault Reporting Reverse Battery Protection Gate Drive Signal for External Low-Side N-Channel MO...

Applications: The write disable (WDS) instruction disables all program- ming capabilities. This protects the entire part against accidental modification of data until a WEN instruction is executed. (When Vcc is applied, this part powers up in the write disabled state.) To protect data, a WDS instructio...

Features: A read operation begins on the falling edge of /CE. At this time, the address bits are latched and a memory cycle is initiated. Once started, a full memory cycle must be completed internally regardless of the state of /CE. Data becomes available on the b after theus access time has been...

· JCP8017-NVA

Vendor:JVC   Package Cooled:QFP   D/C:07/08+   

· JRW017A0B

Vendor:TYCO   Package Cooled:original   D/C:08+   

Description: Notes: 2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required. 3. Inputs have pull-up/pull-down resistors that effect input current. 4. The VCMR is the difference from the most positive side of the differ...

Applications: The JRW017A0B is a monolithic high efficiency power amplifier for AMPS/CDMA dual mode applications in the 824 to 849 MHz frequency band. Performance parameters may be slightly adjusted by tweaking off-chip matching components. The amplifier circuit design is a single ended configuration that ...

Features: 7202/7203/7204. These devices load and empty data on a first-in/first-out basis. They use Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. The reads and writes are internally sequenti...

· J525

· J2927-0A00

· JM38510/65201SDA

· JS28F160J3D75

Description: 1. Short across terminals Do not short circuit between terminals when relay is energized. There is possibility of breaking the internal IC. 2. Surge voltages at the input If reverse surge voltages are present at the input terminals, connect a diode in reverse parallel across the input...

Applications: • Low-power, high-speed CMOS EPROM/ EEPROM technology • Fully static design • Wide operating voltage range 2.5V to 5.5V • Commercial, Industrial, and Extended temperature ranges • Low power consumption < 2 mA @ 5V, 4 MHz 15 µA typical @ 3V, 3...

Features: Altera FLEX JS28F160J3D75 devices are enhanced versions of FLEX 10K devices. Based on reconfigurable CMOS SRAM elements, the FLEX architecture incorporates all features necessary to implement common gate array megafunctions. With up to 200,000 typical gates, FLEX JS28F160J3D75 devices prov...

· JS28F160J3D-75

· JX2N5756

· JDL441442-88/3

Vendor:FUJ   Package Cooled:DIP   D/C:1989   

Description: FPGA devices can be configured with an AT17A Series EEPROM (see Figure 1). The AT17A Series device stores configuration data in its EEPROM array and clocks the data out serially with its internal oscillator. The OE, nCS and DCLK pins supply the control signals for the address counter and th...

Applications: NOTES: 1. Measured from the differential input crossingpoint to the differential output crossingpoint. 2. Defined as skew between outputs as the same supply voltage and with equal load conditions. Measured at the output differential crosspoints 3. Defined as skew between outputs on differen...

Features: Parameter LOGIC OUTPUTS (BUSY, SDO)3 VOL, Output Low Voltage VOH, Output High Voltage VOL, Output Low Voltage VOH, Output High Voltage High Impedance Leakage Current High Impedance Output Capacitance LOGIC OUTPUT (SDA)3 VOL, Output Low Voltage

· JAN2N5784

Description: Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual pr...

Applications: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" ...

Features: The JAN2N5784/24 is based on the JAN2N5784irrus Logic JAN2N5784rystalJAN2N5784lear Stream Processor (SP) DSP core. The SP core is optimized for digital audio processing, and is powerful enough to handle complex signal processing tasks such as Dolby Digital AJAN2N5784-3 decoding (JAN2N5784 o...

· JA225010

Description: This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT sh...

Applications: The 556C/W for the SOTC23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOTC23 package. Another alternative would b...

Features: Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification ...

· JM38510/10101BGA

Description: The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks, a configuration controller and a flash memory. The flash memory is used to st...

Applications: Boundary-scan Description Language (BSDL). ISP allows the device to be programmed without removing it from the printed circuit board. In addition to simplifying the manufac- turing flow, ISP also allows design modifications to be made in the field via software.

Features: The JM38510/10101BGA is Analog Devices latest 32-step-up/step-down control digital potentiometer emulating mechanical potenti- ometer operation1. Its simple up/down control interface allows manual control with just two external pushbutton tactile switches. The JM38510/10101BGA is designed...

· JANTX2N6279

· JANTX2N7227

Description: HY5V28C(L)F is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compa...

Applications: When used as a position sensor, the output of the sensor consists of 3 digital signals, indicating the position of the sensor: the ball is in the middle (horizontal), is at the front side (down) or is at the end (up). The position of the ball is sensed every 15.6 msec. For this the analog out...

Features: Note 2: Unless otherwise specified, tests are performed at Tj = 25˚C with pulse testing so that junction temperature does not change during test Note 3: Set current is the current flowing into the V+ pin. For the Basic 2-Terminal Current Source circuit shown on the first page of this data ...

· J2N302

· JV2N1053

Description: S3067 has the ability to bypass the internal VCO with an external source and also with the receive clock. The device generates 14/15, 15/14, 16/17 and 17/16 clocks based upon the received clock and an external clock to incorporate the FEC capability. The dividers support the first two r...

Applications: The DRV593 and DRV594 are internally protected against thermal and current overloads. Logic-level fault indicators signal when the junction temperature has reached approximately 115C to allow for system-level shutdown before the amplifiers internal thermal shutdown circuitry activates. ...

Features: RFB = 800 Ω, No Peaking, G = 3160 No Peaking, G = 3 3706 V Step, G = 3, CLOAD = 300 pF TA = 25C to 85C, 3 V (6 V Step) CLOAD = 300 pF, RS = 10.5 Ω, RLOAD > 1 kΩ, RFB = 2.32 kΩ 1 V (2 V Step), CLOAD = 5 pF, RS = 0 Ω, RLOAD > 1 kΩ, RFB = 750 kT...

· JAN2N5755

Vendor:MOTOROLA   Package Cooled:CAN   D/C:00+   

Description: An internal 4-bit DAC is supplied for internal reference level generation. This may be used during CDS to reference CIS signals or during Reset Level Clamping to clamp CCD signals. An external reference level may also be supplied. ADC references are generated internally, ensuring optimum perf...

Applications: The MAX3316CMAX3319 transceivers have a proprietary low-dropout transmitter output stage enabling RS-232- compatible performance from +2.25V to +3.0V with a dual-charge pump. These devices require only four 0.1µF capacitors, and are guaranteed to operate at data rates up to 460kbps. Th...

Features: The JAN2N5755 provides 15704 bits of memory in four application zones. Each application zone is protected by multiple security codes independently from unauthorized read/write/erase access. An internal security fuse protects the personalized data written by card issuer.

· JM38510/30901BFA

Vendor:F   Package Cooled:SOP16   D/C:06+   

Description: This is an input pin to the device and is generated by the master that is controlling the device. This is a clock signal that synchronizes the communication between a master and the device. All input informa- tion (DI) to the device is latched on the rising edge of this clock input, while ...

Applications: A: The value of R JA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25C. The value in any a given application depends on the user's specific board design. The current rating is based on the t 10s thermal resistance rating. B: Re...

Features: PARAMETER VID Section DAC Output Voltage (Note 1) DAC Output Line Regulation DAC Output Temp Variation VID Input LO VID Input HI VID Input Internal Pull-Up Resistor to V5 Power Good Section Under-Voltage lower trip point Under-Voltage upper trip point UV Hysterises Over-Voltage upper ...

· JS24K374

· JM38510/34002BCA

Description: When handling individual devices (which are not yet mounting on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be mad...

Applications: 1.56 V@VDD=3.3 V). The design of proper sense circuitry is a matter of scaling the RSENSE and the gain in buffer transistor to meet the logic high as shown in Figure 4. Assuming the VBE(min) of the transistor is approx. 0.5 V. Table 1 lists some recommended RSENSE values according to the ...

Features: Small Size Industry Standard Footprint Compatible with IR Solder Diffused Optics Operating Temperature Range of -30C to +85C • Right Angle Package Available • Five Colors Available • Available in 8 mm Tape on 7 in. (178 mm) Diameter Reels

· JX2N796

· JM38510/10901SPA

Vendor:NSC   Package Cooled:DIP   D/C:04/   

Description: NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 7. VCC = 5.0V, VEE = 0V, ...

Applications: Notes: 3. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle (see Figure 2). CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD...

Features: The Sirenza JM38510/10901SPA is a passive mixer designed for systems that require high linearity down- or up-conversion. It employs proprietary silicon FETs with proven reliable core-and-wire baluns. It operates efficiently over a wide range of Local Oscillator powers, with input third or...

· JANTXS2N6802A

Description: The i.MX (Media Extensions) series provides a leap in performance with an ARM9™ microprocessor core and highly integrated system functions. The i.MX products specifically address the requirements of the personal, portable product market by providing intelligent integrated periphera...

Applications: The receive filter is a digital filter that meets CCITT G.714 requirements with a high-pass filter that is selectable through the I2C interface. The device operates in either the 13-bit linear or 8-bit µ-law companded mode, which is selectable through the I2C interface. The gain defa...

Features: The LT®1310 boost DC/DC converter combines a 1.5A current mode PWM switcher with an integrated phase- locked loop, allowing the user to set the switching fre- quency anywhere from 10kHz to 4.5MHz. Intended for use in applications where switching frequency must be accu- rately controlled, ...

· JANTX2N2305A

· J2-Q04A-P

Applications: • The basic gate function is lined up as Renesas uni logic series. • Supplied on emboss taping for high-speed automatic mounting. • Electrical characteristics equivalent to the HD74LV245A Supply voltage range : 1.65 to 5.5 V Operating temperature range : C40 to +85C •...

Features: The J2-Q04A-P and J2-Q04A-P series of CMOS operational amplifiers use auto-zeroing techniques to simultaneously provide very low offset voltage (5µV max), and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high inpu...

· JX2N5155

· J2N4047

· JQX-62F-12V-1H-F20000

· JM39014/02-1350JM39014/02-1350JM39014021350

· JM39014/02-1298VJM39014/02-1298VJM39014021298V

· JS29F64G08CAMD2

· JX2N3963

Vendor:MOTOROLA   Package Cooled:CAN   D/C:08+   

· JDV2S06S

Vendor:SOD-523   Package Cooled:TOSHIBA   D/C:05+   

Description: Transmit data, K-generator channels A and B. In multiplexed channel mode, when CODE = low, this terminal is the 9th bit of a 10-bit word to be transmitted. When CODE = high, this terminal acts as the K-character indicator. When TDBA8 = high, the data on TDBA[7:0] is encoded into a K-characte...

Applications: Direction of Rotation: When the codewheel rotates counter- clockwise, as viewed looking down on the module (so the marking is visible), channel A will lead channel B. If the codewheel rotates in the opposite direction, channel B will lead channel A.

Features: • Thermal overload of Windings • Low Voltage Cutout • Electrically - Isolated Power Supply • Power Off Manual Resaet • Automatic Reset with Minimum Off Delay Timer • UL File Number SA3745 (41AA) • UL/CSA/CE pending on all other ratings

· JANTX2N3879A

Vendor:MOT   Package Cooled:TO-66   D/C:08+   

· JTX2N5569

· JANTX2N2806

Description: 2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurem...

Applications: The MAX6501CMAX6504 fully integrated temperature switches incorporate two temperature-dependent refer- ences and a comparator. One reference exhibits a pos- itive temperature coefficient and the other a negative temperature coefficient (Figure 1). The temperature at which the two reference vo...

Features: The JANTX2N2806 will operate over a wide range of frequencies from 25 to 200 MHz. Operation to 200 MHz is possible with the use of dual drivers at pins 8 and 9. With a wide range of selectable bandwidths, the JANTX2N2806 is a very flexible low-EMI clock. Modulation can be disabled to prov...

· JM38510/30009BCA(54LS30)

Vendor:MOT   Package Cooled:CDIP14   D/C:94+   

Description: The ADE7756 contains a sampled Waveform register and an Active Energy register capable of holding at least five seconds of accumulated power at full load. Data is read from the ADE7756 via the serial interface. The ADE7756 also provides a pulse output (CF) with a frequency that is proporti...

Applications: Input Data Mask: DM(LDM,UDM) is an input mask signal for write data. Input data is masked when DM is sampled HIGH along with that input data during a WRITE access. DM is sampled on both edges of DQS. Although DM pins are input only, the DM loading matches the DQ and DQS loading. LDM correspo...

Features: The JM38510/30009BCA(54LS30) is designed to replace a single SO-8 FLMP MOSFET and Schottky diode in synchronous DC:DC power supplies. This 30V MOSFET is designed to maximize power conversion efficiency, providing a low RDS(ON) and low gate charge. The JM38510/30009BCA(54LS30) includes an int...

· JTS01-10LT100I

Description: Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product. No mask charge,...

Applications: The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command.

Features: By combining a conventional thin-film R-2R ladder DAC, a digital offset technique with analog correction and an advanced one-bit DAC using first order noise shaping technique, the PCM67 and PCM69A achieve high resolution, minimal glitch, and low zero-crossing distortion.

· JANTXS2N6305A

Description: Chrontels CH7008 digital PC to TV encoder is a stand- alone integrated circuit which provides a PC 99 compliant solution for TV output on non-DVD enabled systems. Suggested application use with the Intel 810 chipset & Intel 810E chipset.* It provides a universal digital input port to...

Applications: Switching Performance Encode Pulsewidth High Encode Pulsewidth Low Aperture Delay (tA) Aperture Uncertainty (Jitter) & Noise Data Sync Setup Time (tSDS) Data Sync Hold Time (tHDS) Data Sync Pulsewidth Time (tPWDS) Output Valid Time (tV) Output Prop. Delay (tPD)

Features: NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. The increase in supply current is attributable to each output that is at the specified voltage level rather than VCC or GND. 3. This is measured by the voltage drop between the A and B terminals at the indicated current through t...

· JX2N2322

Vendor:MOTOROLA   Package Cooled:CAN3   D/C:08+   

Description: A capacitive load on the regulators output will appear as a short circuit during start-up. If the capacitance is too large, the output voltage will not come into regulation during the initial TON period and the UCC381 will enter pulsed mode operation. The peak current limit, TON period, a...

Applications: 1. Cost The cost of both the component and the manufacturing overhead of battery-backed SRAM is high. FRAM with its monolithic construction is inherently a lower cost solution. In addition, there is no built-in rework step required for battery attachment when using surface mount parts....

Features: PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

· JANTX2N2220A

· J2N5891

· JM38510/10901BPC

Vendor:CDIP8   Package Cooled:1432   D/C:TI   

Pages: 65/320  At 10 61 62 63 64 65 66 67 68 69 70 Under 10

Quick Search Part No.

Home About Us Map Online Inquiry
© 2009-2011 ExchangeIC.com Corp.All Rights Reserved