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· NOVAG854-5

· NTB22N06T4

Description: slope going through 0 at the sampling point. This, expanded out gives us an approximation of the error generated by the non-zero sampling time. This implies that the error generated is proportional to the slew rate of the input, multiplied by the aperture time. This result is very simila...

Applications: The command register itself does not occupy any addressable memory location. The register is a latch used to store the commands, along with the address and data information needed to execute the command. The command register is written to bring #WE to logic low state, while #CE is at logic lo...

Features: The following specifications apply for V+ = +3.0 VDC to +3.6 VDC, and all analog source impedance RS = 50 Ω unless other- wise specified in the conditions. Boldface limits apply for NTB22N06T4CIMT TA = TJ = TMIN=0˚C to TMAX=85˚C; all other limits TA = +25˚C. TA is the a...

· NMC27C32BQE-200/150

· N52345-10

· ND3260-LB

Description: (2) The technical information described in this material is limited to showing representative characteris- tics and applied circuits examples of the products. It neither warrants non-infringement of intellec- tual property right or any other rights owned by our company or a third party, no...

Applications: The entire power stage of the PA03 may be disabled using one of the circuits shown in Figure 1. There are many applications for this function. One is a load protection based on power delivered to the load or thermal rise. Another one is conservation of power when using batteries. The con...

Features: The ND3260-LBS320C672x is the next generation of Texas Instruments' C67x™ family of high-performance 32-/64-bit floating-point digital signal processors. The ND3260-LBS320C672x includes the ND3260-LB, ND3260-LB, and ND3260-LB devices. (1)

· NP7250-BA1CES

Vendor:57   Package Cooled:BGA   D/C:N/A   

· NLV32--056J-PF

Vendor:TDK   Package Cooled:06+   D/C:200000   

· NRC226M10R12

Description: Single Supply for Read and Write: 2.7V to 3.6 (BV), 3.0 to 3.6V (LV) Fast Read Access Time - 70 ns Internal Program Control and Timer Sector Architecture C One 16K Byte Boot Block with Programming Lockout C Two 8K Byte Parameter Blocks C Two Main Memory Blocks (32K, 64K) Bytes Fast Era...

Applications: The NRC226M10R12A ECL-compatible, 500Msps, 8-bit analog- to-digital converter (ADC) allows accurate digitizing of analog signals from DC to 250MHz (Nyquist frequen- cy). Dual monolithic converters, driven by the track/hold (T/H), operate on opposite clock edges (time inter- leaved). Designed ...

Features: insertion when required as defined in the CCITT recommendation V.14 (V.22).The NRC226M10R12 implements the data modes for the synchronous interface as specified in the V.14 (V.22). The device can be configured to operate at any frequency to maximum device speed within the above mentione...

· NJM022M(T1)

Vendor:JRC   Package Cooled:SOP   D/C:2003   

Description: Note 3: Without a heat sink, the thermal resistance of the TO-3 package is about 35˚C/W. With a heat sink, the effective thermal resistance can only approach the specified values of 2˚C/W, depending on the efficiency of the heat sink.

Applications: The automatic restart circuit detects a motor lock condition and automatically turns off the output current. When the lock condition is cleared, the IC automatically restarts and allows the motor to run. In the AH280, automatic restart is performed in the

Features: FEATURES NJM022M(T1): 8 Buffered 8-Bit DACs in 16-Lead TSSOP A Version: 1 LSB INL, B Version: 0.75 LSB INL NJM022M(T1): 8 Buffered 10-Bit DACs in 16-Lead TSSOP A Version: 4 LSB INL, B Version: 3 LSB INL NJM022M(T1): 8 Buffered 12-Bit DACs in 16-Lead TSSOP A Version: 16 LSB INL, B Ver...

· NF4-SLI-SPPX-A2

· NFM40R11C221T1M00-54

Description: Ground connection. For best performance, keep traces physically short and connect immediately to ground plane. Analog gain adjustment for all amplifiers. Valid control ranges are from 0V to 2.5V. Maximum gain is selected with 2.5V. Minimum gain is selected with 0V. These voltages are only...

Applications: The NFM40R11C221T1M00-54 is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor (R1) should be connected as close to the regulator as possible to minimize line drops which effective...

Features: Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by im...

· NE651R479A

· NJU7012F-TE247

Vendor:JRC   Package Cooled:2062.7748092   D/C:SOT23/5   

· NJU7012F-TE278

Vendor:JRC   Package Cooled:2070.2557252   D/C:SOT23/5   

· N83C196KB12

Description: Another multiplexer system using the OTAs clocked by a CMOS flip-flop is shown in Figure 6. The high output voltage capability of the CMOS flip-flop permits the circuit to be driven directly without the need for PNP level-shifting transistors.

Applications: Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see Elect...

Features: The AGC dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. The AGC allows the full range of sound, from whispers to loud sounds, to be recorded with minimal distortion. Nominal val- ues of 4.7 µF give satisfactory results in mos...

· N83C196KB-12

· NX100A-16

Description: The Electrical and Switching Characteristics of the HCPL-2300/HCPL-0300 are guaranteed over a temperature range of -40C to 85C. This enables the user to confidently design a circuit which will operate under a broad range of operating conditions.

Applications: A read cycle is accomplished by asserting output enable (OE), chip select (CS), with write enable (WE) High. The chip drives I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or write enable is active, output drivers stay in h...

Features: The NX100A-16 8310 NX100A-16 8311 Octal Latched Peripheral Drivers provide the function of latching eight bits of data with open collector outputs each driving up to 100 mA DC with an operating voltage range of 30V Both devices are designed for low input currents high input output voltage...

· NLFC423232T-4R7M-PF

· NJU4051V

Vendor:JRC   Package Cooled:03+   D/C:SSOP-16   

· N80C32PLCCDC95

Description: The LM2696 is capable of switching frequencies in the range of 100 kHz to 500 kHz. Combined with an integrated 130 mΩ high side NMOS switch the LM2696 can utilize small sized external components and provide high efficiency. An internal soft-start and power-good flag are also provide...

Applications: N80C32PLCCDC95 is a Darlington power transistor module with a ULTRA HIGH hFE, high speed, high power Darlington transistor. The transistor has a reverse paralleled fast recovery diode (trr 200ns). The mounting base of the module is electrically isolated from semiconductor elements for simple...

Features: International standard package JEDEC TO-247 AD IGBT and anti-parallel FRED in one package 2nd generation HDMOSTM process Low VCE(sat) - for minimum on-state conduction losses MOS Gate turn-on - drive simplicity Fast Recovery Epitaxial Diode (FRED) - soft recovery with low IRM

· NJM2370R35

Description: 1. Corrected the errata 2. Updated DC parameters to RMS Values 3. Revised Warm Reset Timing Diagram 4. Added INT Capacitance Information 5. Added Speed Information Ordering Information 6. Added Booting Sequence in Technical Note 7. Revised OTP Program and Lock Flow Chart 8. Revised tOEZ des...

Applications: ‡ Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-µF capacitor across the input and a 0.1-µF capacitor across the output. Full range for the NJM2370R35 is T J ...

Features: The KMY 24 is a microwave rader motion sensor based on the Doppler effect. It transmits a low energy microwave radiation at 2.45 GHz which is reflected by objects. If the object is moving relative to the sensor, a Doppler shift occurs. The shifted wave is mixed with the original wave in...

· NTFE9C6074

· NM27C256A200

· NJM7032M/TE3

Vendor:JRC   Package Cooled:SOP   D/C:99+   

Description: Note - If an of the identified ranges include code positions to which no character is allocated, the repertoire of the collection will change if an additional character is assigned to any of those positions at a future amendment of this International Standard.

Applications: The phase detector and the M divider force the VCO output frequency to be 2M times the reference frequency by ad- justing the VCO control voltage. Note that for some values of M (either too high or too low), the PLL will not achieve lock. The output of the VCO is scaled by a divider prior...

Features: CSE+, CSEC (Pin 6, 5): ME Current Sense Differential Input. Connect CSE+ through a series resistor to the drain of ME and CSEC through a series resistor to the source of ME. The NJM7032M/TE3 monitors the CSE inputs 250ns after ME goes high. If the inductor current reverses and flows into ME c...

· NJM2406F-TE19

Vendor:JRC   Package Cooled:2006.6679389   D/C:SOT23/5   

· NE556N1

Vendor:PHILIPS   Package Cooled:N/A   D/C:00+   

· NTCG103NH221J

Vendor:600000   Package Cooled:TDK   D/C:2008   

· N85C224-80(N85C224-66)

Vendor:INTEL   Package Cooled:PLCC-28   D/C:03+   

· NM03AB

Description: READ CYCLE tRCRead Cycle Time tAAAddress Access Time tACSChip Select Access Time tOEOutput Enable to Output Valid tCLZChip Select to Output in Low Z tOLZOutput Enable to Output in Low Z tCHZChip Deselection to Output in High Z tOHZOut Disable to Output in High Z tOHOutput Hold from Addre...

Applications: The NM03AB audio power amplifier features built-in AGC circuitry and Spatializer environ. The Spatializer environ is Desper Products, Inc.'s exclusive signal processing technology that is able to generate surround sound for low-power mobile applications. The...

Features: Using NFS gives great flexibility to the developer for controlling, debugging, and analyzing the target system from the host. This application note describes how to build an NFS for a Linux target on a Linux host system, how to download kernels from a host to a target, and how to start the...

· NL322522T-R22J-S

Description: Isolation Test Voltage 5300 VRMS Current-limit Protection High-reliability Monolithic Detector Low Power Consumption Clean, Bounce-free Switching High Surge Capability Surface Mountable Lead-free component Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC

Applications: The PT8000 series is a 60 A high- performance, Integrated Switching Regulator (ISR) housed in a single low-profile 44-pin SIP package. Operating from an input voltage of +5V, the PT8000 series offers a state-of-the-art Plug-in Power solution for highly-integrated digital systems that ...

Features: 8V to 35V operation 5.1V reference trimmed to 1% 100Hz to 500KHz oscillator range Separate oscillator sync terminal Adjustable deadtime control Internal soft-start Input undervoltage lockout Latching P.W.M. to prevent multiple pulses • Dual source/sink output drivers

· NLV25T-6R8J-PF

Description: A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into ...

Applications: Inherently Matched LED Current High Efficiency: 84% Typical Drives Up to Four LEDs from a 3.2V Supply Drives Up to Six LEDs from a 5V Supply 36V Rugged Bipolar Switch Fast 1.2MHz Switching Frequency Uses Tiny 1mm Tall Inductors Requires Only 0.22µF Output Capacitor Low Profile SC70 a...

Features: For applications requiring constant frequency operation, the Burst Mode operation feature can be defeated using the MODE/SYNC pin. Higher than 36V switch voltage applications are possible with the NLV25T-6R8J-PF by connecting the SENSE pin to a resistor in the source of the power MOSFET.

· NCV551SN32T1G

Vendor:ON   Package Cooled:08+   D/C:SOT23-5   

Applications: The received serial data is internally converted to parallel by the on chip serial-to-parallel converters and stored sequentially in a 256-position Data Memory. By using an internal counter that is reset by the input 8 KHz frame pulse, F0i, the incoming serial data streams can be framed and ...

Features: The devices are customized by loading configuration data into the internal memory cells. The FPGA can either actively read its configuration data out of external serial or byte- parallel PROM (master modes), or the configuration data can be written into the FPGA (slave and peripheral mode...

· NTCCM16084BH332J

Description: The megapixel CMOS image sensor features Digital- ClarityMicrons breakthrough low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitiv- ity) while maintaining the inherent size, cost, and inte- gration advantages of CMOS.

Applications: Insulated Gate Bipolar Transistors (IGBTs) from International Rectifier have higher usable current densities than comparable bipolar transistors, while at the same time having simpler gate-drive requirements of the familiar power MOSFET. They provide substantial benefits to a host of high-volt...

Features: Figure 6 is a plot of absolute linearity and relative linearity versus wiper position for the DS1267 at 25C. The specification for absolute linearity of the DS1267 is 0.75 MI typical. The specification for relative linearity of the DS1267 is 0.3 MI typical.

· NLD252018T-6R8J

· NTCG164LH683HT

· NC7SZ384M5X-NL

Vendor:FAIRCHILD   Package Cooled:SOT-153   D/C:07+(ROHS)   

Description: Program Strobe Enable: The read strobe to external program memory. When executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches ...

Applications: Dropout Voltage The input/output Voltage differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 100mV below its nominal value. Dropout voltage is affected by junction temperature, load cur- rent an...

Features: NOTE: 1. The INPUT/OUTPUT SELECTION Table describes the total possible combinations of input and output interfaces. Single-Ended (SE) inputs in a single-ended mode require the A/VREF pin to be connected to GND. Differential Single-Ended (DSE) is for single-ended operation in differential mod...

· NJM2406F-TE163

Vendor:JRC   Package Cooled:2042.3931298   D/C:SOT23/5   

· NTMD6N03R2G

Vendor:ON   Package Cooled:SOIC   D/C:2006+   

Description: Once again, consider the curve in Figure 5. Power amplifier dissipation is equal to the power from the power supply minus the power delivered to the load. The power from the power supply, PS, is the same whether the load impedance is resistive or reactive. But if the load is completely rea...

Applications: (Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, VIN1 = +5V, VIN2 = +3.3V, VON1 = VON2 = +2.7V, TA = +25C, unless otherwise noted. Channels 1 and 2 are identical in performance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)

Features: Protocol Overview The SPI interface is a synchronous serial interface using clock and data pins. It is intended to support multiple devices on the bus. Each device is activated using a chip select. Once chip select is activated by the bus master, the FM25L16 will begin monitoring the cl...

· NTCG203BH102H

Vendor:600000   Package Cooled:TDK   D/C:09+   

· NTCDS3SG104JC3NB

· NMP70165

Vendor:PHIL   Package Cooled:SOP   D/C:06+   

Description: A logic low on the CHIP ENABLE input will prevent the drivers from turning ON, regardless of the state of other inputs or the logic supply voltage. The CHIP ENABLE input has a slow response time and should not be used as a high-speed control line. For proper operation, all ground termi...

Applications: NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung shall not offer for sale or sell either directly or through and third-party proxy, and DRAM memory products that include "Multi-Die Plastic DRAM" for use as components in general and scientific computers such a...

Features: Hynix NMP70165-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous opera- tions referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and...

· NEPW500A

Vendor:.   Package Cooled:.   D/C:07+   

· NRC25J101TR

Description: The S2/SUSPEND input can be configured to shut down a customizable set of outputs and/or PLLs, when LOW. All PLLs and any of the outputs can be shut off in nearly any combi- nation. The only limitation is that if a PLL is shut off, all outputs derived from it must also be shut off. Suspending ...

Applications: ZS and ZL reflect the impedances that should be pre- sented to the transistors base and collector. The pack- age parasitics are dominated by inductance (as shown in Figure 3), and need to be accounted for when calcu- lating ZS and ZL. The internal bond and package inductances shown in Figure...

Features: Stanford Microdevices NRC25J101TR is a high performance SiGe Heterojunction Bipolar Transistor MMIC Amplifier. A Darlington configuration featuring 1 micron emitters provides high FT and excellent thermal perfomance. The heterojunction increases breakdown voltage and minimizes leakage cur...

· N760118CFKC

· NLH252018T-R56J

Description: High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices CISP circuitry compatible w...

Applications: Output Enable, asynchronous input, active LOW. Combined with the synchronous logic block inside the device to control the direction of the I/O pins. When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are tri-stated, and act as input data pins. OE is maske...

Features: Multiply divide functions Full duplex UART Four pulse train generators with 16-bit prescalers Two 16-bit input capture modules with 8-bit prescalers Two 16-bit timers each with two 16-bit registers supporting Processor independent PWM mode External event counter mode Input capture mo...

· NL322522T-R12J-2

· NE59214

Vendor:PHILIPS   Package Cooled:BGA   D/C:90+   

· NLH252018T-010J

Vendor:SMD/DIP   Package Cooled:SN   D/C:08+   

Description: Stresses above the ratings listed below can cause permanent damage to the V104. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sect...

Applications: Quiescent current consumption for the device under normal (non-dropout) conditions is typically 200 µA. An integrated charge pump is internally enabled only when the device is operating near dropout with low VIN. This ensured that the device meets the dropout specifications even for m...

Features: TACH and POLE. In order to develop a low-jitter tachometer signal (TACH) for use in controlling motor speed, the ANLH252018T-010JCEB di- vides the frequency of the H1 input by the number of poles in the motor. This elimi- nates the jitter caused by variations in Hall- effect device p...

· NAC15A-4N

Vendor:FCI   Package Cooled:08+   D/C:10000   

· NRS685M20R8

Description: When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by...

Applications: Thermal Design The IRU1015 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction tempera- tures in the range of 150!C, it is recommended that the sele...

Features: This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the...

· NL8060BC26-14

Vendor:NEC   Package Cooled:10.4   D/C:LCD   

· NIN-FB470JTR

· NE39G

· NAND256

· NAND02GW

Vendor:ST   Package Cooled:SLC   D/C:07+   

· NJM2233BV

Description: Note A: Characteristic data has been developed from actual products tested at 25 C. This data is considered typical data for the ISR. Note B: SOA curves represent operating conditions at which internal components are at or below manufacturers maximum rated operating temperatures.

Applications: 16 Channels 12-bit (4096 Steps) Grayscale PWM Control Dot Correction C 6 bit (64 Steps) Drive Capability (Constant-Current Sink) C 0 mA to 80 mA LED Power Supply Voltage up to 17 V VCC = 3.0 V to 5.5 V Serial Data Interface, SPI Compatible Controlled In-Rush Current 30-MHz Data Transfer ...

Features: I2C uses a two wire serial interface, comprising a bi-directional data line and a clock line. The devic- es carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I 2C bus definition. The device behaves as a slave in the I2C protocol, with all memory operations...

· NJU7064M

Vendor:JRC   Package Cooled:SMD   D/C:97   

Description: - Address Input - Data Input/Outputs - Interrupt, Frequency Test Output (Open Drain) - Power-On Reset Output (Open Drain) - Chip Enable - Output Enable - Write Enable - Power Supply Input - Ground - No Connection - Crystal Connection - Battery Connection

Applications: pins appear in the upper center of Figure 2. They are used to write and read a block of control registers. These registers supply the RDRAM configuration information to a controller and they select the oper- ating modes of the device. The nine bit REFR value is used for tracking the last...

Features: Port 2 (A8C15) C I/O. Port 2 is a biCdirectional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pullCup holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pullCup. When sof...

· NJU7329BRB2

Vendor:JRC   Package Cooled:SSOP   D/C:0504+PB   

· NCR15380

Vendor:N/A   Package Cooled:DIP   D/C:NEW   

Description: This device is a single chip PC peripheral microcon- troller based on the Universal Serial Bus (USB) Version 1.1 specification. This device provides data exchange between a USB-equipped host computer and PC peripherals such as telephones, audio sys- tems and digital cameras. See Figure 1.1 fo...

Applications: II, the maximum input current at maximum input voltage, is a measure of the input leakage current at the guaranteed minimum input breakdown voltage of 7.0V. Although some users consider this to be a test of the input breakdown itself, that voltage is typically over 15V. At room temperatur...

Features: The NCR15380/NCR15380 require 4.5V to 6V dual supplies. For applications where these supply voltages are not present, a DC-DC converter must be added. Due to the devices low current consumption, a charge pump can provide the proper supply voltages and requires a minimal amount of board space ...

· NP03SB2R7M

· NLV32T-8R2J-PF

Description: Notes 1. Test voltage must be applied within dv/dt rating. 2. All devices are guaranteed to trigger at an IF value less than or equal to max IFT. Therefore, recommended operating IF lies between max IFT (15 mA for MOC3061-M, 10 mA for MOC3062-M & MOC3162-M, 5 mA for MOC3063-M & MOC...

Applications: This is a dual function pin. In the IDT Standard mode, the EFA function is selected. EFA indicates whether or not the FIFO2 memory is empty. In the FWFT mode, the ORA function is selected. ORA indicates the presence of valid data on the A0-A35 outputs, available for reading. EFA/ORA is synchron...

Features: Operating voltage: fSYS=4MHz: 3.3V~5.5V fSYS=8MHz: 4.5V~5.5V 13 bidirectional I/O lines An interrupt input shared with an I/O line 8-bit programmable timer/event counter with overflow interrupt and 8-stage prescaler On-chip crystal and RC oscillator Watchdog timer 1024´14 program...

· N82S130

Description: NOTES: 1. Minimums are guaranteed but not production tested. 2. This parameter is guaranteed but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch al...

Applications: The SoftStart charge eases batteries into the fast charge stage by gradually increasing the duty cycle of the charge. The gradual increase alleviates the voltage peak and the -∆V condition. The duty cycle of the applied current is increased to the fast charge rate, as shown in Figure 3,...

Features: Specification is not production tested but is supported by characterization data at initial product release. Full-scale error applies to both positive and negative full scale and applies at the factory calibration conditions (VDD = 4 V). 3The N82S130 can tolerate absolute analog input volta...

· NE6500379A-TI

Vendor:NEC   Package Cooled:06+   D/C:358   

Description: High current sink/source 25 mA/25 mA Four external interrupt pins Timer0 module: 8-bit/16-bit timer/counter Timer1 module: 16-bit timer/counter Timer2 module: 8-bit timer/counter Timer3 module: 16-bit timer/counter Timer4 module: 8-bit timer/counter Secondary oscillator clock option...

Applications: If the 3-wire port is used, the master provides one of four memory function commands: 1) read memory, 2) read scratchpad, 3) write scratchpad, or 4) copy scratchpad. The only way to write memory is to first write the scratchpad and then copy the scratchpad data to memory. (See Figure 6.)

Features: The advantages of Current Source Inverters lie in their ease control, absence of large commutation induc- tances and limited fault currents. Their simple construction, illustrated by the circuit on the left, is further enhanced by the use of MAGN-A- paks which allow the power circuit of an In...

· NACV820M160V16X17TR13F

Vendor:NIC   Package Cooled:SMD   D/C:07+   

· NM93S06LM8

Vendor:NS   Package Cooled:05+   D/C:05+   

Description: The FSTD3306 is a 2-bit ultra high-speed CMOS FET bus switch with enhanced level shifting circuitry and with TTL- compatible active LOW control inputs. The low on resis- tance of the switch allows inputs to be connected to out- puts with minimal propagation delay and without generating ...

Applications: • Hot-swapping and hot-docking (low resistance for PCI and Compact PCI applications) • Bus switching and isolation • Voltage translation (5V to 3.3V) • Capacitance reduction and isolation • Power conservation • Logic replacement (data processing) ...

Features: The NM93S06LM8 and the NM93S06LM8 are single-channel, nega- tive-voltage hot swap controllers designed to address the need for safe insertion and removal of circuit boards into live high-voltage system backplanes, while using very few exter- nal components. The NM93S06LM8 and the NM93S06L...

· NCP4302ADR2G

Description: Typical Applications • Vibration Monitoring and Recording • Appliance Control • Mechanical Bearing Monitoring • Computer Hard Drive Protection • Computer Mouse and Joysticks • Virtual Reality Input Devices • Sport Diagnostic Devices and Systems

Applications: Note 3 a) In addition the voltage between the V a pin and either input pin must not exceed 36V b) When the voltage applied to an input pin is driven more than 0 3V below the negative supply pin voltage a substrate diode begins to conduct Current through this pin must then be kept less than ...

Features: The S3C72N8/C72N5 microcontroller is also available in OTP (One Time Programmable) version, S3P72N8/P72N5. S3P72N8/P72N5 microcontroller has an on-chip 8/16-Kbyte one-time-programmable EPROM instead of masked ROM. The S3P72N8/P72N5 is comparable to S3C72N8/C72N5, both in function and in pin ...

· NC17SZ125M5X-NL

· ND171N12

Vendor:EUPEC   Package Cooled:55   D/C:MODULE   

· NJM2360M559

· NJM2872BF15-TE1-ZZZ

Description: The SY89113U is a 2.5V low jitter, low skew, 1:12 LVDS fanout buffer optimized for precision telecom and enterprise server distribution applications. The input includes a 2:1 MUX for clock switchover applications. Unlike other multiplexers, this input includes a unique isolation design that m...

Applications: The ISL6434 monitors all the output voltages. A single Power Good signal is issued when the core is within 10% of the DAC setting and all other outputs are above their under- voltage levels. Additional built-in overvoltage protection for the core output uses the lower MOSFET to prevent ou...

Features: The NJM2872BF15-TE1-ZZZ integrates a low dropCout regulator, 18 precise switched 110 ohm termination resistors, and bus termination sensors into a 28Cpin 300 mil SOIC package. Active termination provides: greater immu- nity to voltage drops on the TERMPWR (TERMination PoWeR) line, enhan...

· ND1MX32AQ-7

Description: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably...

Applications: OPERATION OF STEP-UP CONVERTER A step-up converter diagram is illustrated below. In the diagram, the converter can generate a fixed, higher voltage from a lower one. When SW stays ON, IL1 flows through L, and the converter converts the electric energy into the magnetic one and stores it in L...

Features: 500 MHz, 2.0 ns Instruction Cycle Rate 12M Bits of InternalOn-ChipDRAM Memory 2525 mm (576-Ball) Thermally Enhanced Ball Grid Array Package Dual Computation BlocksEach Containing an ALU, a Multi- plier, a Shifter, and a Register File Dual Integer ALUs, providing Data Addressing and Po...

· NTR1P02T3G

Vendor:0N   Package Cooled:SOT-23   D/C:07+(ROHS)   

Description: The standard device offers access times of 70, 90, 120, and 150 ns, allowing high-speed microprocessors to operate without wait states. To eliminate bus con- tention, the device has separate chip enable (CE#), write enable (WE#), and output enable (OE#) controls.

Applications: Modulator The modulator is a direct conversion double balanced quadrature mixer architecture. The local oscillator sig- nal is buffered then split with internal phase shifters that are optimized for twice the operating frequency. The LO buffer provides isolation from load changes that m...

Features: The NTR1P02T3G is a 3-channel ASK receiver for 125-kHz carrier signals. Its three active input stages with very low power consumption and high input sensitivity allow to connect up to 3 antennas for direction-independent wake-up function and data transfer.

· NEC2707

Vendor:NEC   Package Cooled:02+   D/C:1780    

Description: An input capacitor of 2.2µF (nominal value) or greater, connected between the Input pin and Ground, located in close proximity to the device, will improve transient response and noise rejection. Higher values will offer supe- rior input ripple rejection and transient response. An in...

Applications: The two VREF pins (A3 and T3), are connected together internally by approximately 150 Ω. However, it is necessary to connect only one of the two VREF pins to the external VREF power supply. An unused VREF pin should be terminated with a VREF coupling capacitor.

Features: PCM Output Register The decoded 8-bit parallel PCM data is loaded into an 8-bit parallel-to-serial output shift register with the falling edge of CE. The MSB data is shifted out with the leading edge of CE, and subsequent data are shifted out with the rising edges of PSCK while CE is hig...

· NJU7012F-TE40

Vendor:JRC   Package Cooled:2011.2099237   D/C:SOT23/5   

· NJM2125FV(TE1)

Description: Functional Description The HSDL-3310 is a small form factor infrared (IR) transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA physical layer specifications 1.3 and is IEC 825-Clas...

Applications: Supply filtering A 0.1µF to 1µF bypass capacitor from IN to GND, lo- cated at the NJM2125FV(TE1), is strongly recommended to control supply transients. Without a bypass capacitor, an out- put short may cause sufficient ringing on the input (from supply lead inductance) to damage i...

Features: Options :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. High Isolation Voltage (5.3kVRMS ,7.5kVPK ) Zero Voltage Crossing 625V Peak Blocking Voltage All electrical parameters 100% tested Custom electrical ...

· NCP302HSN10T

Vendor:ON   Package Cooled:08+   D/C:SOT23-5   

· NB7L11MMNG

Description: Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels, but are 5-V tolerant and can be directly driven by TTL or 5-V CMOS devices. VREF is the B-port differential input reference voltage.

Applications: Depending on the model selected, a number of control and status functions are available to enhance the operation of the LDO regulator. An Enable pin, available on all devices, allows the user to shut down the regulator output to conserve power, reducing supply current to less than 1µ...

Features: Analog Ground Logic output. When low, indicates that the level of the input signal has overloaded the amplifier. Positive 5 Volts Logic input. When high, both amplifiers are muted. When low (grounded), both amplifiers are fully operational. Single-ended input (Channel 1 & 2) Break-befor...

· NFM3212R13C221RT1MOO-67(NFM3DCC221R1H3L)

Vendor:MURATA   Package Cooled:0603-221   D/C:05+   

· NJM2100V-TE2

Vendor:JRC   Package Cooled:TSSOP   D/C:634   

Description: Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.

Applications: The integrated 4B/5B and 5B/6B encoder/decoder may be by- passed (disabled) for systems that present externally encoded or scrambled data at the parallel interface. With the encoder bypassed, the pre-encoded parallel data stream is converted to and from a serial NRZI stream. The embedded ...

Features: Clocks in the ispLSI 2064 and 2064A devices are se- lected using the dedicated clock pins. Three dedicated clock pins (Y0, Y1, Y2) or an asynchronous clock can be selected on a GLB basis. The asynchronous or Product Term clock can be generated in any GLB for its own clock.

· N6630CR

Description: Supports 8-bit and 16-bit operation modes Eight 8-bit reload counters Eight 8-bit reload registers for L pulse width Eight 8-bit reload registers for H pulse width A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit prescaler plus 8-bit reload coun...

Applications: The device is compatible with the JEDEC single power-supply Flash command set standard. Com- mands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits. D...

Features: dMAX Dual Data Movement Accelerator. The dMAX is a module designed to perform Data Movement Acceleration. The Data Movement Accelerator (dMAX) controller handles user-programmed data transfers between the internal data memory controller and the device peripherals on the C672x DSPs. The dMAX ...

· NLT3225T-8R1B

Vendor:TDK   Package Cooled:1210   D/C:08+   

· NT68625HMFG-128

Vendor:NOVATEK   Package Cooled:QFP   D/C:08+   

· NTSD0XV103PE1B0

Vendor:MURATA   Package Cooled:DIP   D/C:08/ROHS   

· NRA335M16R8.

Description: The ACE8001 is a member of the ACEx (Arithmetic Controller Engine) family of microcontrollers. It is a dedicated programma- ble monolithic integrated circuit for applications requiring high performance, low power, and small size. It is a fully static part fabricated using CMOS technology.

Applications: A HIGH on this pin when BM is HIGH selects byte bus (9-bit) size on Port B. A LOW on this pin when BM is HIGH selects word (18-bit) bus size. SIZE works with BM and BE to select the bus size and endian arrangement for Port B. The level of SIZE must be static throughout device operation.

Features: Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: DGND and AGND should be tied together in normal operation. Note 3: An internal clamp limits the GATE pins to a minimum of 12V above VEE. Driving this pin beyond the clamp may damag...

· NJM082G

Description: The information and specifications herein are believed to be correct at time of publication. However, V-INFINITY LLC ac cepts no responsibility for consequences arising from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompa...

Applications: The CY7C1380D/CY7C1382D SRAM integrates 524,288 x 36 and 1,048,576 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The sy...

Features: LINE DRIVERS Line drivers which will interface with the NJM082G are listed below. Balanced Drivers DS26LS31: Quad RS-422 Line Driver, Dual CMOS DS7830, DS8830: Dual TTL DS7831, DS8831: Dual TRI-STATE TTL DS7832, DS8832: Dual TRI-STATE TTL DS1691A, DS3691: Quad RS-423/Dual RS-422 TTL ...

· NB7L111MMNG

Vendor:ON   Package Cooled:QFN-52/-40~85    D/C:DC05   

Description: Supports 3.0V, 2.5V and 1.8V I/O's M/S = VDD for BUSY output flag on Master M/S = VSS for BUSY input on Slave Input Read Register Output Drive Register BUSY and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchro...

Applications: TSOP40 C 40 lead Plastic Thin Small Outline, 10 x 20mm, Package Outline . . . . . . . . . . . . . . . . 23 TSOP40 C 40 lead Plastic Thin Small Outline, 10 x 20mm, Package Mechanical Data . . . . . . . . 23 SO44 C 44 lead Plastic Small Outline, 525 mils body width, Package Outline. . . . . ....

Features: 2.1 General. The documents listed in this section are specified in sections 3 and 4 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ens...

· NL8060AC24-01

· NCL39491C1DICE

· N80C32-33C

Vendor:INTEL   Package Cooled:PLCC44   D/C:95+   

Description: The analog input RGB signals are first sampled by three channels of 8-bit A/D converters, and the 24-bit RGB data are then fed into the SD1010A. The SD1010A is capable of performing automatic detection of the display resolution and timing of input signals generated from various PC graphic ca...

Applications: - Removed all references to XCLKS, since function is removed. - typo - replaced PRU with RPU. - typo - replaced ATAHC with ATA5HC - Removed references to clock monitor, since function is not available. - Update JA for 100-pin and 64-pin packages. - Add footnotes on IRQ pin removal in 6...

Features: The N80C32-33C is a complete microstepping motor driver with built-in translator for easy operation. It is designed to operate bipolar stepper motors in full-, half-, eighth-, and sixteenth-step modes, at up to 35 V and 1 A. The N80C32-33C includes a fixed off-time current regulator w...

· NTMFS4744NT1G

Vendor:ON   Package Cooled:QFN PB   D/C:05+   

Description: • Power-on Reset (POR), Power-up Timer (PWRT), and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator • Programmable code protection • Power saving SLEEP mode • Selectable oscillator options, including: - 4X Phase ...

Applications: CBR refresh is performed by bringing CAS low earlier than RAS (see parameter tCSR) and holding it low after RAS falls (see parameter tCHR). For successive CBR refresh cycles, CAS can remain low while cycling RAS. The external address is ignored, and the refresh address is generated internal...

Features: accessed with 40ns access times to any of its registers, including its packet memory. No DMA services are used by the NTMFS4744NT1G; virtually decoupling network traffic from local or system bus utilization. For packet memory management, the NTMFS4744NT1G integrates a unique hardware Memory ...

· NI-8

Description: TYPICAL APPLICATION Used in conjunction with NSCs LM12XX Preamplifier and LM24XX CRT Driver, a complete analog video solution from the preamplifier input to the CRT cathode can be achieved. The NI-8 can support any AC coupled DTV application using formats up to 1080i with proper selectio...

Applications: This 32-bit buffer/driver is built using advanced dual metal CMOS technology. This high-speed, low power device offers bus/backplane interface capability with improved packing density. The device has a flow- through organization for simplifying board layout. The three-state controls opera...

· NLD252018T-330J

Description: Designed for the fast growing direct broadcast satellite (DBS) digital TV receiver market, the SGS-THOMSON NLD252018T-330JB Digital Satellite Receiver Front-end integrates all the functions needed to demodulate incoming digital satellite TV signals from the tuner : Nyquist filters, QPSK...

Applications: The ACT16241 are 16-bit buffers or line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-b...

Features: When mute is activated, the output PWM becomes zero data (50% duty cycle). The two mute flags, MUTEL and MUTER, are independently set low based on the data in the respective channel being zero. This function becomes active under the following conditions:

· N09B

Description: DESCRIPTION The SMP80MC is a series of micro capacitance transient surge arrestors designed for the protec- tion of high debit rate communication equipment on CPE side. Its micro capacitance avoids any dis- tortion of the signal and is compatible with digital transmission like ADSL2 an...

Applications: 75 Volt Motor Supply Voltage 30 Amp Output Switch Capability 100% Duty Cycle High Side Conduction Capable Shoot-Through/Cross Conduction Protection Hall Sensing and Commutation Circuitry on Board "Real" Four Quadrant Torque Control Capability Good Accuracy Around the Null Torque...

Features: Features of the N09B include enable input and current- limit protection. As a µCap design, the N09B is stable with ceramic output capacitors. The N09B is packaged in the IttyBitty® SOT-23-6, and is offered in fixed and adjustable output voltages. Junction temperature range of...

· N83C196K12

· NACXR47M63V4X5.5TR13F

Vendor:NIC   Package Cooled:SMD   D/C:07+   

· NIPEDC0804

Description: The three LEDs on the EV kit indicate the charging status: • LED1 (FULLCHG) indicates that the battery pack is being charged with a constant voltage. • LED2 (FASTCHG) indicates that the battery pack is being charged with a constant current. • LED3 (FAULT) indicates that ...

Applications: Although the discrete ORing diode solution has been used for some time and is inexpensive to implement, it has some drawbacks. The primary downside is the increased power dissipation loss in the ORing diodes as power requirements for systems increase. Another disadvantage when using an O...

Features: Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage...

· NDB4060278

· NSC800N-4I

Vendor:NS   Package Cooled:DIP   D/C:01+   

Description: 1) Delay measured at 1.5V on leading edge only with no loads on output. 2) Rise time measured from 0.75V to 2.4V. 3) Delay will inversely vary approximately 4% for every 5% change in supply voltage. 4) Supply voltage (VCC) = 5.0.25VDC 5) Input test pulse: 3.2V, 2nS rise time, width>40%...

Applications: The VP-1000A is totally self-contained. It can access the external memory all by itself without the help from any microprocessor. Although the chip provides only 15 address lines, an external counter can be easily added to extend the memory addressing to virtuely no limitation. Therefore...

Features: The NSC800N-4I provides a universal interface to allow a glueless connection to most commonly available graphics controllers. Some of the advantages of this universal interface include selectable bus widths, adjustable signal levels, and differential and single-ended clocking. The adjustabl...

· NSC800N4I

Vendor:NS   Package Cooled:DIP-40   D/C:98+   

Description: The CKE input determines whether the CLK input is enabled. The next rising edge of the CLK signal will be valid when is CKE HIGH and invalid when LOW. When CKE is LOW, the device will be in either power-down mode, clock suspend mode, or self refresh mode. CKE is an asynchronous input.

Applications: -0.5V. During voltage transitions, A9, OE and RESET may overshoot VSS to -2.0V for periods of up to 20ns. Maximum DC input voltage on A9 is +12.5V which may overshoot to 14.0V for periods up to 20ns. 3. No more than one output is shorted at a time. Duration of the short circuit shou...

Features: The NSC800N4I/NSC800N4I/NSC800N4I are improved high-precision, medium volt- age analog switches designed to operate with +3V to +8V power supplies. The NSC800N4I is a dual, single-pole single-throw (SNSC800N4IST), normally open (NO) switch. The NSC800N4I has the same pinout as the NSC800N4...

· NJM2374AE-TE1

Applications: The RDA012M4 is a digital-to-analog converter (DAC) with a 4:1 input multiplexer and a maximum update rate of 1.3GS/s. The integrated DAC utilizes a segmented current source to reduce the glitch energy and to achieve high linearity performance. For best dynamic performance, the DAC outputs are

Features: The ISSI IS62LV12816BLL is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power c...

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