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· OBM221-BN

Vendor:NEC   Package Cooled:IGBT   D/C:02+   

· OR3T80-7

Vendor:ORCA   Package Cooled:QFP   D/C:01+   

Description: Noise bypass Capacitance Cp Noise bypass capacitance Cp reduces noise generated by band-gap reference circuit. Noise level and ripple rejection will be improved when larger Cp is used. Use of smaller Cp value may cause oscillation. Use the Cp value of 0.01uF greater to avoid the problem.

Applications: CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating, and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Features: The OR3T80-7 is a precision clock multiplier that exceeds the requirements of high-speed communication systems, including OC-192/OC-48 and 10 Gigabit Ethernet. This device phase locks to an input clock in the 19, 39, 78, 155, 311 or 622 MHz frequency range and generates a frequency-multiplie...

· OPA4228U/2K5

Vendor:BB/TI   Package Cooled:7630   D/C:SOP14   

· OPA4353EA250

· OUAZ-SS-105D

Description: The parameter tOH indicates the system compatibility of this device when driving other synchronous logic with positive input hold times, which is controlled by the same synchronous clock. If tOH is greater than the minimum required input hold time of the subsequent synchronous logic, the...

Applications: In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, these devices are relatively immune to short-duration, negative-going VCC transients (glitches). The Typical Operating Characteristics show the Maxi- mum Transient Duration vs. Reset Threshold...

Features: The OUAZ-SS-105D has CMOS standby mode which reduces the maximum V CC current to 20µA. It is placed in CMOS standby when CE is at VCC 0.3 V. The OUAZ-SS-105D also has a TTL- standby mode which reduces the maximum V CC current to 1.0 mA. It is placed in TTL- standby when CE is at VI...

· OUAZ-SS--105D

Vendor:NAIS   Package Cooled:DIP   D/C:2007   

· OZ6933B-D

Vendor:MICRO   Package Cooled:BGA   D/C:0519+   

· OTI95C71/16

Vendor:7500   Package Cooled:PLCC68   D/C:07+   

Description: HOTLink II devices are ideal for a variety of applications where parallel interfaces can be replaced with high-speed, point-to-point serial links. Some applications include interconnecting backplanes on switches, routers, servers and video transmission systems.

Applications: The three transmitter operating modes C transmit ASK, transmit OOK, and power-down (sleep), are controlled by the Modulation & Bias Control function, and are selected with the CNTRL1 and CNTRL0 control pins. Setting CNTRL1 high and CNTRL0 low place the unit in the ASK transmit mode. Settin...

Features: When used as a code hopping encoder, the OTI95C71/16 is ideally suited to keyless entry systems; vehicle and garage door access in particular. The same OTI95C71/16 can also be used as a secure bi-directional transponder for contactless token verification. These capabilities make the OTI9...

· OP27EY

Description: These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Applications: *Absolute Maximum Ratings are limiting values to be applied individually and beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. Exposure to absolute maximum rating conditions for extended periods o...

Features: Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: OP27EYCG: TJ = TA + (PD 95C/W) OP27EYCUHF-1: TJ = TA + (PD 34C/W) N...

· OP42GJ

Description: The oscillator may also be overdriven if desired, although care must be taken to ensure that the backplane driver is not disabled during the negative portion of the overdriving signal (which could cause a DC component to the display). This can be done by driving the OSCillator input between th...

Applications: A high on the Latch Enable input will cause the counter output to remain high once an output pulse occurs, and to remain in the high state until the latch input returns to low. If the Latch Enable is low, the output pulse will remain high for only one cycle of the clock-input signal.

Features: Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual pr...

· OEC7072A

Description: Ripple Rejection Output Voltage Temperature Coefficient Short Current Limit Pull-down resistance for CE pin CE Input Voltage H CE Input Voltage L Thermal Shutdown Detector Threshold Temperature Thermal Shutdown Released Temperature

Applications: Common-Mode Leakage DIGITAL INPUTS Input Logic High (SDA and SCL) Input Logic Low (SDA and SCL) Input Logic High (AD0) Input Logic Low (AD0) Input Current Input Capacitance6 DIGITAL OUTPUTS Output Logic Low (SDA) Three-State Leakage Current (SDA) Output Capacitance6 POWER SU...

Features: The OEC7072A is a low-power, two-channel CMOS 8-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the OEC7072A is fully speci- fied over a sample rate range of 50 kSPS to 200 kSPS. T...

· OPAS49T

· OP290GPZ

Description: In the normal mode, these devices are functionally equivalent to the F244 and BCT244 octal buffers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary-test cells. Activating the TAP ...

Applications: The PHY uses the S5_LKON_DS2 terminal to notify the LLC to power up and become active. When activated, the output S5_LKON_DS2 signal is a square wave. The PHY activates the S5_LKON_DS2 output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the...

Features: The OP290GPZ is a multifunction chip optimized for CDMA-1x cell phone power management. It offers a total power solution for the handset baseband and RF section, including LDOs to power 11 subsystems. Also integrated are a real-time clock (RTC), serial bus interface, and charging control ...

· OP4244OP4244OP4244

· OP14BICZ

Vendor:ADI   Package Cooled:1000   D/C:CDIP   

Description: The Word Program operation consists of issuing the SDP Word Program command, initiated by forcing CE# and WE# low, and OE# high. The words to be programmed must be in the erased state, prior to programming. The Word Program command programs the desired addresses word by word. During the Word ...

Applications: Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions (TA = 0 to 70 C) General Recommended Operating Conditions Analog Input and ...

Features: Connect to a low impedance negative voltage power supply for stage 2 current control. From pinchoff, adjust VG2 voltage to achieve 155mA of stage 2 current, ID2. This current is optimum for high power CDMA operation up to 28.5dBm output power. For improved performance, adjust to lower current...

· OBS017ZE-9

Description: Between t7 and t8, the converter reaches its peak current limit which is determined by RPL and VIN. Once the limit is reached, the converter operates in continuous mode with approximately 200mA of ripple current. At time t8, the output voltage is satisfied, and the converter can ser- vic...

Applications: The PI6C2308 provides 8 copies of a clock signal that has 200ps phase error compared to a reference clock. The skew between the output clock signals for PI6C2308 is less than 200ps. When there are no rising edges on the REF input, the PI6C2308 enters a power down state. In this mode, the PLL i...

Features: Parameter Total Gate Charge (turn-on) Gate - Emitter Charge (turn-on) Gate - Collector Charge (turn-on) Turn-On Switching Loss Turn-Off Switching Loss Total Switching Loss Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Switching Loss Turn-Off Switching L...

· OPA301AID

Vendor:TI   Package Cooled:SOP   D/C:04/   

Description: The information provided herein is believed to be reliable; however, C&D TECHNOLOGIES assumes no responsibility for inaccuracies or omissions. C&D TECHNOLOGIES assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's o...

Applications: System integration unit (SIU) Bus monitor Software watchdog Periodic interrupt timer (PIT) Clock synthesizer Decrementer and time base Reset controller IEEE 1149.1 test access port (JTAG) Interrupts Seven external interrupt request (IRQ) lines Seven port pins with inte...

Features: The OPA301AID comprise a series of four-channel programmable amplifiers providing a level of versatility unsurpassed by any other monolithic operational amplifier. Versatility is achieved by employing four input amplifier channels, any one (or none) of which may be electronically selecte...

· OR3C80-5BA352

Vendor:ORCA   Package Cooled:BGA   D/C:N/A   

· OP27Z/883Q

Vendor:AD   Package Cooled:D/C   D/C:500   

· OP220G

Description: Power Supply Description The SiW3500 operates at 1.8 V core voltage for internal analog and digital circuits. The chip has internal analog and digital voltage regulators simplifying power supply requirements to the chip. The internal voltage regulators can be supplied directly from a batte...

Applications: CS/WDI Chip Select Input. CS HIGH, deselects the device and the SO output pin is at a high impedance state. Unless a nonvolatile write cycle is underway, the device will be in the standby power mode. CS LOW enables the device, placing it in the active power mode. Prior to the start of a...

Features: • Solid-state potentiometer • Three-wire serial interface • 100 wiper tap points Wiper position stored in nonvolatile memory and recalled on power-up • 99 resistive elements, log taper Temperature compensated End to end resistance, 15% Terminal voltages, 5V ...

· OPA2177P

· OSC8341012

· OP297FS-REEL

Description: NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum...

Applications: The MAX104 is ideal for many applications where high sampling rates are required to either capture an instantaneous value from a fast-moving signal, such as in a high-speed data acquisition (DAQ) application, or to digitize a complex high-frequency, high-bandwidth signal. One example of thi...

Features: Microcontrollers are often used in harsh environments where power supply transients, electromagnetic interference (EMI), and electrostatic discharge (ESD) are abundant. Program corruption caused by bus corruption and electromagnetic discharges can cause a microprocessor to execute erroneous ...

· OF739R

Description: Note: The over-temperature protection is a last resort mecha- nism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recom- mended and will reduce the long-term reliability of the module. Always operate the regulator within the sp...

Applications: . . . using the Schottky Barrier principle with a large area metalCtoCsilicon power diode. Ideally suited for low voltage, high frequency rectification or as free wheeling and polarity protection diodes in surface mount applications where compact size and weight are critical to the system...

Features: The Hynix OF739R Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The Hynix OF739R Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clo...

· OW0503561K

· OPA2650P

Description: Charge in Li-Ion and Li-Polymer Batteries Supports the Smart Battery Specification (SBS) V1.1 Integrated Time Base Removes Need for External Crystal Works With the TI bq29311 Analog Front End (AFE) Protection IC to Provide Complete Pack Electronics for 10.8-V or 14.4-V Battery Packs With F...

Applications: Read (READ) The READ instruction is the only instruction that outputs serial data on the DO pin. After the read instruction and address have been decoded, data is transferred from the selected memory register into a 8-bit or 16-bit serial shift register. (Please note that one logical "0...

Features: Chip Select (CS is an active low input. Whenever CS isCS)CS high the OPA2650P is in standby mode and consumes the least power. This mode is equivalent to a potentiometer that is adjusted to the required setting. When CS is low the OPA2650P will recognize transitions on the INC input and wi...

· OSC8341013

· OP4005B

Vendor:RFM   Package Cooled:N/A   D/C:N/A   

· OP813GS

Description: Optocoupler, precision reference and error amplifier in single package 2.5V reference CTR 100% to 200% 5,000V RMS isolation UL approved E90700, Volume 2 CSA approval 1296837 VDE approval 40002463 BSI approval 8702, 8703 • Low temperature coefficient 50 ppm/C max...

Applications: The OP813GS supports the I2C Bus data transmission protocol. This Inter-Integrated Circuit Bus protocol defines any device that sends data to the bus to be a transmitter and any device receiving data to be a receiver. Data transfer is controlled by the Master device which generates the ...

Features: A/D (Y and composite) reference voltage high-level input A/D (Y and composite) use A/D (Y and composite) use Digital use 6.75-MHz output Digital I/O (3.3 V) use Clamp pulse (sync chip) output Test I/O (MSB) (open or VSS) Test I/O (open or VSS) Digital use Test I/O (open or VSS) ...

· OP491AY

Vendor:PMI/ADI   Package Cooled:1620   D/C:CDIP14   

Description: NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 2. Input and output paramete...

Applications: External interrupt ! 3, Internal timer interrupt ! 6, Serial I/O interrupt ! 1, OSD interrupt ! 1, Multi-master I 2 C-BUS interface interrupt ! 1, Data slicer interrupt ! 1, f(XIN)/4092 interrupt ! 1, VSYNC interrupt ! 1, A- D conversion interrupt ! 1, BRK instruction interrupt ! 1

Features: The OP491AY is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNGs high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on e...

· OP193ES

Description: This IC is a microminiature low-noise stabilized power supply device featuring a highly precise output voltage and a small input/output voltage difference of only 0.15V at an output current of 60mA. The IC delivers output currents of up to 200mA, and through use of a noise pin output noise is...

Applications: Tutte le informazioni contenute sul presente manuale sono state accuratamente verifi- cate, ciononostante grifo® non si assume nessuna responsabilit per danni, diretti o indiretti, a cose e/o persone derivanti da errori, omissioni o dall'uso del presente manuale, del software o dell' h...

Features: Note 1: See thermal regulation specifications for changes in output voltage due to heating effects. Line and load regulation are measured at a constant junction temperature by low duty cycle pulse testing. Note 2: Line and load regulation are guaranteed up to the maximum power dissipation of...

· OPTI82C602

Description: The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (tog- gle) status bits. After a program or erase cycle is completed, the device is ready to read array data or accept another command.

Applications: The LS323 is an 8-bit universal shift storage register with TRI-STATE outputs Its function is similar to the LS299 with the exception of Synchronous Reset Parallel load in- puts and flip-flop outputs are multiplexed to minimize pin count Separate inputs and outputs are provided for flip- ...

Features: Now consider what happens to the inductors current during these two states. In State 1, the input voltage is being applied to one side of the inductor, and the output voltage to the other side. For a buck converter, the input voltage is neces- sarily larger than the output voltage, and so...

· OCM422LD

Description: The drivers provide four selectable levels of preemphasis to compensate for transmission line losses. The receivers incorporates receive equalization and compensates for input transmission line loss. This minimizes deterministic jitter in the link. The equalization is optimized to compensat...

Applications: Associated with each of the 8 OR functions is an I/O macrocell that can be independently programmed to one of 12 different configurations. The programmable macrocells allow each I/O to be used to create sequential or combinatorial logic functions of active-high or active-low polarity, while p...

Features: Ringing is applied to the line by disconnecting pin 8, RF, from pin 9, RV, and connecting it to a ringing source which is battery backed. This may be done by use of an electro-mechanical relay. The SLIC is capable of detecting an Off Hook condition during ringing by filtering out the large A.C...

· OP262GZ

Vendor:SOP8   Package Cooled:N/A   D/C:1000   

· OP184FSZ-REEL7

Description: Note 4: For the purpose of specifying deserializer PLL performance tDSR1 and tDSR2 are specified with the REFCLK running and stable, and specific conditions of the incoming data stream (SYNCPATs). tDSR1 is the time required for the deserializer to indicate lock upon power-up or when leaving t...

Features: This manual includes hardware details and programming information for the MC68HC000, the MC68HC001, the MC68EC000, and the MC68SEC000. For ease of reading, the name M68000 MPUs will be used when referring to all processors. Refer to M68000PM/AD, M68000 Programmer's Reference Manual, for deta...

· OP42G/GP34

· OP720AP

· OP108AH/883

· OPA650UA

Vendor:BB/TI   Package Cooled:4378   D/C:SOP8   

Description: The device operates on demand via a sync input pin. The sync input can also be used to avoid external noise sources and cross-interference from adjacent QRG capacitive sensors. Unique among capacitance sensors, this device features spread-spectrum burst modulation, permitting extremely high ...

Applications: Notes: 1: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at con- ditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time. 2: Based on long-t...

Features: The OPA650UA checks battery status to warn of potential data loss. Each time that VCC power is restored to the OPA650UA, the battery voltages are checked with precision comparators. If both batteries providing backup power to a particular SRAM are less than 2.0 volts, the second memory acc...

· OP249BJ

Description: Tiny SOT−353 and SOT−553 Packages Extremely High Speed: tPD 2.5 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation, CMOS Compatible Over Voltage Tolerant Inputs VIN may be Between 0 and 7.0 V for VCC Between 0.5 and 5.4 V TTL Compatible − Interface Capabi...

Applications: Due to the size of the package, Microns standard part number is not printed on the top of each device. Instead, an abbreviated device mark comprised of a five-digit alphanumeric code is used. The abbreviated device marks are cross referenced to the Micron part numbers in Table 1.

Features: The OP249BJT/OP249BJB is a high speed 131,072 x 8 bit CMOS flash memory. Programming or erasing the device is done with a single 5 Volt power supply. The device has separate chip enable CE, program enable WE, and output enable OE controls to eliminate bus contention. The OP249BJT/OP2...

· OPA2338

Description: DESCRIPTION The M74HC4017 is an high speed CMOS DECADE COUNTER/DIVIDER fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transiti...

Applications: Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. S...

Features: In the areas of strategic focus and in the wake of successful product launches, the GSM business posted 84% year-on- year growth in shipments and Japanese standards shipments increased 45% year-on-year. This business growth is attributable to a strengthened product offering coupled with stro...

· OP06BIEJ

Description: The HT6P20A/B/D detects the logic state of the internal programmed address and the external data pins, and then trans- mits the detected information during the code period. Each address/data bit can be set to one of the following two logic states:

Applications: The OP06BIEJ, OP06BIEJ are single supply amplifiers with a fixed gain of 20 and an extended common mode voltage range of -5V to 36V. The fixed gain is achieved in two separate stages, a pre-amplifier with gain of +10 and a second stage amplifier with gain of +2. A block diagram of the OP...

Features: Thermal Design The OP06BIEJ incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction tempera- tures in the range of 1508C, it is recommended that the sel...

· OPA337NA/250G4

Vendor:SOT23-5   Package Cooled:6000   D/C:BB   

Description: The circuits of Figures 1 and 3 depend upon the existence of an output voltage (to create VADJ) and, therefore, produce the initial step-function voltage pedestals of about 1.2V and 1.8V, as can be seen in Figures 2 and 4, respectively. The approach of Figure 5 facilitates placing the ou...

Applications: The LIM provides 100% connectivity of the inputs and out- puts of each LC in a given CLB. The benefit of the LIM is that no general routing resources are required to connect feedback paths within a CLB. The LIM connects to the GRM via 24 bidirectional nodes.

Features: 1. X means "Don't Care". 2. ZZ pin is pulled down internally 3. For write cycles that following read cycles, the output buffersmust be disabled with OE, otherwise data bus contention will occur. 4. Sleep Mode means power down state of which stand-by current does not depend on cy...

· OP07AZ/AJ883OP07AZ/AJ883OP07AZAJ883

· ON129

Description: Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services des...

Applications: where fsw is the switching frequency of the PWM signal. VU and VL represent the upper and lower gate rail voltage. QU and QL is the upper and lower gate charge determined by MOSFET selection and any external capacitance added to the gate pins. The IDDQ VCC product is the quiescent power ...

Features: The ON129 is a low-power amplifier with automatic gain control (AGC), designed for WDM transmission systems employing optical amplifiers and requiring a vertical threshold adjustment after the post amp. Operating from a single 3.3V supply, this AGC amplifier linearly amplifies/attenuates the ...

· OP675JG

· OP07BICZOP07BICZOP07BICZ

· OR2C12AS208

Vendor:ORCA   Package Cooled:QFP   D/C:7   

· OPA551

Vendor:TI   Package Cooled:SOP/DIP   D/C:06+   

Description: Number of channels : 8 Resolution : 8-bit or 10-bit selectable Conversion can be performed sequentially for multiple consecutive channels. • Single-shot conversion mode : Converts specified channel once only. • Continuous conversion mode : Repeatedly converts specified channel. ...

Applications: Members of the Texas Instruments Widebus™ Family State-of-the-Art EPIC-B™ BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25C Distributed VCC a...

Features: Important Note: For detector applications with input power levels greater than C20 dBm, use the HSMS-282x series at frequen- cies below 4.0 GHz, and the HSMS-286x series at frequencies above 4.0 GHz. The OPA551 series IS NOT RECOMMENDED for these higher power level applications.

· OIZI867908B

Description: 10.1 All payments required under Section 4.0 or otherwise under this Agreement are exclusive of taxes and END USER agrees to bear and be responsible for the payment of all such taxes (except for taxes based upon DVSI's income) including, but not limited to, all sales, use, rental receipt, p...

Applications: The memory, internal to the device, is organized as 32 pages of eight bytes each. Once an address byte is clocked into the device through the 2-wire interface, the five MSBs decode which page is to be accessed, and the three LSBs decode a particular byte on that page. The selected page is sha...

Features: The OIZI867908B can be used to implement a Hi-Speed USB compliant Host Controller connected to most of the CPUs present in the market today, having a generic processor interface with demultiplexed address and data bus. This is because of the efficient slave-type interface of the OIZI8...

· OP115FS

Vendor:AD    Package Cooled:SOP8    D/C:00+   

Description: The ADR380 and ADR381 are micropower, low dropout voltage (LDV) devices that provide a stable output voltage from supplies as low as 300 mV above the output voltage. They are specified over the industrial (C40C to +85C) temperature range. ADR380/ADR381 is available in the tiny 3-lead SOT-...

Applications: Figure 3 shows the timing relationship between data clock and data enable A maximum clock frequency of 0 5 MHz is assumed For applications where a lesser number of outputs are used it is possible to either increase the current per output or operate the part at higher than 1V VOUT The foll...

Features: This command executes the AUTO REFRESH operation. The row address and bank to be refreshed are automatically generated during this operation. The stipulated period (tRC) is required for a single refresh operation, and no other commands can be executed during this period. This com- mand i...

· OP07/AJOP07/AJOP07AJ

· OZ711E1T

Vendor:MICRO   Package Cooled:TQFP-L208P   D/C:06+   

Description: When 16/68# pin is at logic 1, this input is chip select B (active low) to enable channel B in the device. When 16/68# pin is at logic 0, this input becomes address line A3 which is used for channel selection in the Motorola bus interface. Input logic 0 selects channel A and logic 1 selects...

Applications: DESCRIPTION The OZ711E1T is a low voltage CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. It is composed of four independent 2...

Features: The OZ711E1T controls exposure over a range of 99,000:1 in EIA mode and 146,000:1 in CCIR mode, and operates at illumination levels as low as 0.5 lux at standard clock frequencies. (The system clock frequency can be reduced to provide increased sensitivity.)

· OPA1013KU

Vendor:BB/TI   Package Cooled:4548   D/C:SOP8   

Description: Digital Noise Reduction (DNR) Multiple Chroma and Luma Filters Luma-SSAF™ Filter with Programmable Gain/Attenuation PrPb SSAF Separate Pedestal Control on Component and Composite/S-Video Outputs VCR FF/RW Sync Mode Macrovision Rev 7.1.L1 CGMS/WSS Closed Captioning

Applications: The MAX3311E/MAX3313E internal power supply has a single inverting charge pump that provides a negative voltage from a single +5V supply. The charge pump operates in a discontinuous mode and requires a flying capacitor (C1) and a reservoir capacitor (C2) to gener- ate the V- supply.

Features: The Hyundai HYM71V63M1601 X-Series are 16Mx64bits Synchronous DRAM Modules. The modules are composed of eight 8Mx16bit CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package and 2Kbit EEPROM in 8pin TSSOP package on a 144pin glass-epoxy printed circuit board. Two 0.33uF and one 0.1uF decoupli...

· OP492BY

Vendor:CDIP14   Package Cooled:1678   D/C:03+   

Description: • Miniature Size • Smooth Turning and Detented Options • Multiple Mounting Bracket Options • Uses Optical Reflective Technology • Quadrature Digital Output • Small Footprint for Versatile Mounting • TTL Compatible

Applications: Note 4: VIHCMR minimum varies 1 to 1 with VEE. VIHCMR maximum varies 1-to-1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies be...

Features: System oscillation circuit generates the internal clock signals for the CPU and peripheral hardware. The system clock can use a crystal, or ceramic oscillation source, or an externally-generated clock signal. To drive OP492BY/C0504 using an external clock source, the external clock signal ...

· OP07AJ/883B

Description: HARDWARE PROTECTION: Hardware features protect against inadvertent writes to the AT28C010-12DK in the following ways: (a) VCC sense C if VCC is below 3.8V (typical) the write function is inhibited; (b) VCC power-on delay C once VCC has reached 3.8V the device will automatically time out 5 ...

Applications: To activate this mode, the programming equipment must force 12.0 V 0.5V on address line A9 of the OP07AJ/883B. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH, when A1 = VIH. All other address lines must be held at VIL during ...

Features: The OP07AJ/883B is a programmable shunt voltage reference with guaranteed temperature stability over the entire temperature range of operation (-40 to +125C). The output voltage may be set to any value between 1.24V and 24V with an external resistor bridge.

· OP-07AJ/883B

· OP07AL/QMLROP07AL/QMLROP07ALQMLR

· OP22AZ/883

Description: P63/KEY3/A11 P62/KEY2/A10 P61/KEY1/A9 P60/KEY0/A8 P57/A7 P56/A6 P55/A5 P54/A4 P53/A3 P52/A2 P51/A1 P50/A0 P35/SBT3A/SCL3A P34/SBI3A P33/SBO3A/SDA3A P32/SBT1 P31/SBI1/RXD1 P30/SBO1/TXD1 P25/IRQ5 P24/IRQ4 P23/IRQ3A P22/IRQ2A P21/IRQ1 P20/IRQ0 P16/TM7IOA

Applications: Data are shifted in through the serial port C (SDC0, , SDC3) at the rising edge of the shift clock SCB. After16 clock pulses the data have to be transferred from shift register C to latch C. If more than 16 clock pulses occur before latching the data, only the last sixteen 4-bit data values...

Features: Software features Program Suspend & Resume: read other sectors before programming operation is completed Erase Suspend & Resume: read/program other sectors before an erase operation is completed Data# polling & toggle bits provide status Unlock Bypass Program command r...

· OP07CDR(PBFREE)TRSO83.9MMSMD

Vendor:TI   Package Cooled:N/A   D/C:2008   

· OP11ARC/883C

Vendor:AD   Package Cooled:STK   D/C:2004+   

Description: Loop enable. When LOOPEN is high (active), the internal loop-back path is activated. The transmitted serial data is directly routed to the inputs of the receiver. This provides a self-test capability in conjunction with the protocol device. The DOUT_TXP and DOUT_TXN outputs are held static...

Applications: Notes: 1. Only a single 1% resistor is required in either the (R1) or R2 location. Do not use (R1) and R2 simultaneously. Place the resistor as close to the ISR as possible. 2. Never connect capacitors from Vo adjust to either GND, Vout, or the Sense pins. Any capacitance added to the ...

Features: 4.5VC5.5V operation CMOS SRAM for optimum speed and power Low active power (165 mW max.) Low standby power (L Version)(110 µW max) 2V data retention (L Version) JEDEC-compatible pinout 32-pin, 0.6-inch-wide DIP package TTL-compatible inputs and outputs

· OR2C26A-PS208

· OR2C26APS208

Vendor:ORCA   Package Cooled:QFP   D/C:10   

· OP77-063Z

Description: The BALBSG (the indicates the output voltage value) is a low-saturation series regulator IC employing the super-mini mold package of the SMP5 (2916 package). Equipped with a power-saving function that reduces current consumption, it also offers outstanding ripple rejection and characteristics...

Applications: Loss of Signal The Loss Of Signal (LOS) output indicates an unusable optical input power level. A high LOS output signal indicates a loss of signal while a low LOS output signal indicates normal operation. The Loss Of Signal thresholds are set to indicate a definite optical fault ...

Features: Low-power voltage regulator diodes in small hermetically sealed glass SOD80C SMD packages. The diodes are available in the normalized E24 2% (BZV55-B) and approx. 5% (BZV55-C) tolerance range. The series consists of 37 types with nominal working voltages from 2.4 to 75 V.

· OP77063Z

Description: AVS, BVS, CVS - are the return pins on the bottom of each half bridge. They are brought out separately and should be connected together externally to allow the current from each half bridge to flow through the sense resistor. The wiring on these pins should be sized according to the curre...

Applications: are selected in the First Word Fall Through mode. IR indicates whether or not the FIFO has available memory locations. OR shows whether the FIFO has data available for reading or not. It marks the presence of valid data on the outputs. The FIFO has a programmable Almost-Empty flag (AE) and...

Features: DESCRIPTION: The CENTRAL SEMICONDUCTOR OP77063Z Series Silicon Low Level Zener Diode is a high quality voltage regulator, manufactured in a SUPERmini™ surface mount package, designed for applications requiring a low operating current, low leakage, and a sharp knee.

· OP37FZAOP37FZAOP37FZA

· OP462GSQUAD15MHOP462GSQUAD15MHOP462GSQUAD15MH

· OP196GS-REEL

Description: The CAT24FC02 supports the I2C Bus data transmission protocol. This Inter-Integrated Circuit Bus protocol defines any device that sends data to the bus to be a transmitter and any device receiving data to be a receiver. Data transfer is controlled by the Master device which generates th...

Applications: The gm3110 device is an all-in-one image processor targeted on LCD monitors with resolutions up to XGA (1024x768). The gm3110 leverages Genesis patented advanced image- processing technology as well a Genesis proprietary Ultra- Reliable DVI-compliant digital receiver to provide excellent imag...

Features: The OP196GS-REEL can be configured for automatic power saving Burst Mode operation to reduce gate charge losses when the load current drops below the level required for continuous operation. For reduced noise and RF interfer- ence, the SYNC/MODE pin can be configured to skip pulses or provide...

· OP467JROP467JROP467JR

· OR2C04-2S208

· OP282FS

Vendor:AD PMI   Package Cooled:2000   D/C:SOP8   

· OPA548FKTTT

Vendor:BB   Package Cooled:DDPAK7   D/C:2007   

· OP467CY

Vendor:ADI/PMI   Package Cooled:890   D/C:CDIP14   

Description: The DCP0105 family is a series of high efficiency, 5V input isolated DC/DC converters. In addition to 1W nominal galvanically isolated output power capability, the range of DC/DCs are also fully synchronizable. The devices feature thermal shutdown, and overload protection is implemented ...

Applications: The OP467CY and OP467CY are high-performance fully differential amplifiers from Texas Instruments. The OP467CY, featuring power-down capability, and the OP467CY, without power-down capability, set new performance standards for fully differential amplifiers withunsurpassedlinearity,suppor...

Features: The OP467CY is a 4096-bit, 1-Wire EEPROM chip with seven address inputs. The address inputs are directly mapped into the 1-Wire 64-bit Device ID Number to easily enable the host system to identify the physical location or functional association of the OP467CY in a multidevice 1-Wire network e...

· OR2T08A-3J160

Vendor: ORCA   Package Cooled:QFP   D/C:06+   

Description: A 1µF (min) capacitor from Vout to ground is required. Then output capacitor should have an effective series resistance of 5Ω or less. A 1µA capacitor should be connected from Vin to GND if there is more than 10 inches of wire between the regulator and the AC filter c...

Applications: Test mode (open or VSS) Test mode (LSB) (open or VSS) Internal digital use Digital use Test input VSS) Test input VSS) Test input open or VSS) Digital I/O (3.3 V) use DRAM test input (open or VSS) DRAM test input (open or VSS) Digital use DRAM (5 Mbits) use DRAM test input (...

Features: Naming Conventions. With a south pole in front of the branded surface of the sensor, a north pole behind the sensor, the field at the sensor is defined as positive. As used here, negative flux densities are defined as less than zero (algebraic convention), e.g., -100 G is less than -50 G.

· OM-0.7524P

Vendor:KSS   Package Cooled:KSS CABLE MARKER ROHS WHTIEID3.5MM L17MM '24P'   D/C:2006   

· OP14Z/883

Vendor:PMI/ADI   Package Cooled:DIP   D/C:99+/00+   

Description: Note 1 ICC1 ICC2 ICC3 and ICC4 are measured with no external drive (IOH and IOL e 0 IIH and IIL e 0) ICC1 is measured with RESET e GND ICC3 is measured with NMI e VCC ICC4 is measured with NMI e GND CKI driven to VIH1 and VIL1 with rise and fall times less than 10 ns

Applications: The MC100ES6139 is a low skew 2/4, 4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential...

Features: The OP14Z/883 integrates a low dropCout regulator, 18 precise switched 110 ohm termination resistors, and bus termination sensors into a 28Cpin 300 mil SOIC package. Active termination provides: greater immu- nity to voltage drops on the TERMPWR (TERMination PoWeR) line, enhanced highCl...

· OM7101H/J77

Vendor:PHILIPS   Package Cooled:47   D/C:05+   

Description: MAX 3000A devices are lowCcost, highCperformance devices based on the Altera MAX architecture. Fabricated with advanced CMOS technology, the EEPROMCbased MAX 3000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, ...

Applications: A Read Command will interrupt a burst write operation on the same clock cycle that the Read Command is activated. The DQs must be in the high impedance state at least one cycle before the new read data appears on the outputs to avoid data contention. When the Read Command is activated, any r...

Features: The OM7101H/J77 is a N-Channel Power MOS FET with low on-state resistance and ultra high-speed switching characteristics. Because high-speed switching is possible, the IC can be efficiently set thereby saving energy. The small SOP-8 package makes high density mounting possible.

· OP777ARZ-REEL7(PBFREE)

Vendor:AD   Package Cooled:N/A   D/C:2007   

· OP490GS/GOP490GS/GOP490GSG

· OP496HRUZ-REEL

Description: This is a dual-function pin. In the CY Standard mode, the EF function is selected. EF indicates whether or not the FIFO memory is empty. In the FWFT mode, the OR function is selected. OR indicates the presence of valid data on B0C35 outputs, available for reading. EF/OR is synchronized to ...

Applications: NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 Ω, PRR = 10 MHz, tr and tf (10% to 90%) 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform...

Features: The recommended dose of ultraviolet light for erasure is a wavelength of 2537 Angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The OP496HRUZ-REEL

· OP4955OP4955OP4955

· OP482ARC/883OP482ARC/883OP482ARC883

· OAA160

Vendor:CPClare   Package Cooled:DIP-8P   D/C:06+   

Description: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Any of the amplifier outputs can be shorted to ground indefinetly, however, more than one should not be simultaneously shorted as the maximum junction temperature will be ex...

Applications: Passivated guaranteed commutation triacs in a plastic full pack envelope, intended for use in motor control circuits or with other highly inductive loads. These devices balance the requirementsofcommutation performance and gate sensitivity. The "sensitive gate" E series and...

Features: The OAA160 is comprised of four resistor arrays. Each array contains 63 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (VH/RH and VL/RL inputs).

· OP04EZ(OP04EY)OP04EZ(OP04EY)OP04EZOP04EY

· OPA2336P/AP366

· OP11QY/883

Vendor:PMI/ADI   Package Cooled:DIP   D/C:99+/00+   

Description: The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable out- put. Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the output pins with VCC0V. These circuits pr...

Applications: The OP11QY/883 supports multiple CPUs, all LCD panel types, CRT, and additionally provides a number of differentiating features. Products requiring a Portrait mode display can take advantage of the SwivelView feature. Simultaneous, Virtual and Split Screen Display are just some of the displ...

Features: Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a registered trademark of Texas Instruments. All othe...

· OP04CSOP04CSOP04CS

· OA08

· OV2630-VL7A

· OP42ARCMDOP42ARCMDOP42ARCMD

· OP727ARZ-REEL

Description: PCI stop clock control input. When this signal is at a logic low level (0), all PCI clocks (except PCI_F) stop at a logic low level. Using this pin to start and stop PCI clocks insures synchronous (no short or long clocks) transitioning of these clocks. This pin has no effect on the PCI_F c...

Applications: Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damag...

Features: Each of the Macrocells of the ispGAL22V10 has two primary func- tional modes: registered, and combinatorial I/O. The modes and the output polarity are set by two bits (SO and S1), which are nor- mally controlled by the logic compiler. Each of these two primary modes, and the bit settings ...

· OBF212-42L1533A20

Description: The power circuit and layout within the module are carefully designed to minimize inductance in the power path, to reduce noise during inverter operation and to improve the inverter efficiency. The Driver-Plus Board required to run the inverter can be soldered to the power module pins, t...

Applications: VBIAS (VCC , VBS1,2,3) = 15V, VS0,1,2,3 = VSS and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3 . The VO and IO parameters are referenced to VS0,1,2,3 and are applicable to t...

Features: † Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. E...

· OP207CY

Vendor:AD   Package Cooled:697   D/C:580   

· OR2C26A2PS208-DB

Vendor:LUCENT   Package Cooled:QFP   D/C:1999   

Description: • High-Performance Phase-Locked-Loop Clock Distribution for Networking, • Synchronous DRAM modules for server/workstation/ PC applications • Allows Clock Input to have Spread Spectrum modulation for EMI reduction • Zero Input-to-Output delay • Low jitter: Cycle-t...

Applications: The OR2C26A2PS208-DB 4096k NV SRAM with Phantom Clock is a fully static nonvolatile RAM (organized as 512k words by 8 bits) with a built-in real-time clock. The OR2C26A2PS208-DBY has a self-contained lithium energy source and control circuitry, which constantly monitors VCC for an out-of-toler...

Features: ParameterSymbolConditions I2C INTERFACE TIMING CHARACTERISTICS1 (Specifications apply to all parts) SCL Clock FrequencyfSCL tBUF Bus Free Time between STOP and STARTt1 tHD;STA Hold Time (Repeated START)t2After this period, the first clock pulse is generated. tLOW Low Period of SCL C...

· OPA103U

Vendor:BB   Package Cooled:N/A   D/C:SOP8   

· OP44FZ407

· OPA349NA/3K

Description: The 74HC/HCT377 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock (CP) input loads all flip-flops simultaneously when the data enable (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is trans...

Applications: (3) LUMINANCE SENSOR CONTROL The luminance sensor control circuits consist of the power supply for sensor and the A/D converter. The A/D converter senses the voltage on the SENS terminal and selects 1 out of 8 registers (PWM REGISTER 0C7). And the data in the selected register is reflecte...

Features: The OPA349NA/3K silicon oscillator replaces ceramic res- onators, crystals, and crystal-oscillator modules as the clock source for microcontrollers in 3V, 3.3V, and 5V applications. The OPA349NA/3K features a factory-pro- grammed oscillator and a microprocessor (µP) power- on-reset (POR...

· OP467AY/883COP467AY/883COP467AY883C

· OP462DRU-REELOP462DRU-REELOP462DRUREEL

· OP462DRUREELOP462DRUREELOP462DRUREEL

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